What Is Chip on Board? COB Structure Explained

COB means that an unpackaged semiconductor die is mounted directly onto a PCB or other substrate. All of the attachment, electrical interconnect, and local protection are performed at that level rather than within a standard packaged IC. A COB assembly thus uses a bare die, while a traditional packaged IC has the semiconductor die enclosed within a finished plastic or ceramic package. The presence of a black “blob” of epoxy is often an indicator of this type of construction, but this does not provide any insight into the semiconductor die or interconnection techniques used.

What Does Chip on Board Actually Mean?

COB defines a Packaging and Assembly Technology. The semiconductor die is mounted to a PCB or other substrate, connected electrically at this level, and locally protected. These terms are used to describe where the packaging functions occur, but that does not provide any conclusive evidence to infer if the semiconductor die functions as a controller, memory, driver, sensor, or another type of circuit.

Unpackaged Semiconductor Die refers to the piece of semiconductor that has been cut from a wafer before being packaged traditionally. In the Classic COB method, the unpackaged semiconductor die is placed face up on an attachment layer and fine wires are joined to connect the semiconductor pads to the substrate pads. Afterwards, protection can be applied over both. TAB and other direct-die methods can also be included within the general definition of COB.

Historically, the IPC Guidelines for Chip-On-Board Technology Implementation utilized the COB term as an umbrella term to cover direct-die methods of mounting semiconductor die to PCBs, including chip-and-wire and flip-chip. Currently, the IPC Document Revision Table indicates that IPC-SM-784 is no longer maintained. It is useful for historical terminology, not as a current acceptance standard.

Inside a COB Assembly: Four Separate Functions

COB assemblies combine four physical functions: the die provides the electronic function; the die attachment secures the die to the printed circuit board or carrier; the electrical interconnect connects the die pads to the external circuitry; and the protection limits physical and environmental exposure; separating these functions prevents the visible epoxy from being mistaken for the entire technology even when materials or interconnect topology change.

Bare die

The die itself is in a bare die or “naked” state and lacks the molded body, external leads, and external pads of a packaged IC. The die has exposed connection areas, and its dimensions and pad configuration are specified in die-level documentation rather than a generic package drawing.

Die attachment

The die attachment layer holds the die to the board or substrate and can influence the mechanical and thermal path through the assembly. Both conductive and non-conductive materials are used as die attachment layers; silver-filled epoxy is one possible conductive die attachment material. As a reference point in the industry, conductive die attachment epoxies are commonly cured within a range of 15 minutes to a few hours at temperatures from approximately 150°C down to below 100°C for slower curing or low-stress materials, and typically have a bond-line thickness in the tens of microns. The final bond-line thickness, exact chemistry, surface preparation, and cure time will be determined by the specific process and the material’s datasheet.

Electrical interconnection

The interconnect provides connectivity from the die pads to the surrounding circuit and carries signals and power between both. The Assembly and Packaging Key Technologies developed by Microchip list wire bonding and flip-chip among current methods of connecting bare dies. Wire bonding is a common method of connecting bare dies, and qualified processes can use gold, aluminum, or copper wire along with a compatible pad finish.

Protection

Protection refers to protecting the die and interconnects from physical and environmental damage. Henkel’s Board-level encapsulants distinguishes common methods of encapsulation. A “glob top” is a type of encapsulation where material is deposited directly over the chip and wire bonds, whereas a “dam-and-fill” method involves building a dam around the area and then filling it with a lower-viscosity material. The height of a dam is commonly at least roughly 200 microns above the highest wire loop, and the PCB or substrate is typically preheated to a temperature between 60°C and 110°C to facilitate even flow around the fine wires. A cover, cavity, underfill, or another qualified protective system may also be used.

How Is COB Different From a Packaged IC?

For a packaged IC, the PCB or substrate receives the finished package via external leads, balls, or pads, rather than contacting the semiconductor bond pads directly.

The LFCSP Guide from Analog Devices (AN-772) shows the die, internal wire bonds, and mold compound inside an LFCSP, while exposed pads connect the package to a PCB. Likewise, the Semiconductor Packaging Assembly Technology from Texas Instruments describes the assembly process, which separates package formation from later PCB mounting.

SMD is an industry term that describes surface mounting, not one internal package architecture. A packaged SMD IC is considered to be a finished part or component, while a COB die becomes part of the substrate assembly.

Wire-Bond COB, Flip-Chip, and Embedded Die

Wire-bond COB, flip-chip-on-board, and embedded die are all methods that can involve bare semiconductor dies. However, these methods are not interchangeable or synonymous. While wire-bond and flip-chip methods define interconnect topologies on the substrate surface, embedded die also changes the physical location of the device by placing the die inside a cavity or laminate structure.

IPC’s previous guidance grouped chip-and-wire and flip-chip as COB subsets, while current usage can separate them. Microchip states that wire bond and flip-chip remain distinct interconnect methods. To identify an assembled die, determine its orientation and trace the route from its pads to the surrounding circuit.

The IPC document Implementing Embedded Component from Concept-To-Manufacturing describes components or bare die placed within substrate cavities and interconnected through the structure of the board. A surface COB die remains on the board or carrier surface.

Can a Black Epoxy Blob Identify the Chip?

No. The black blob of resin could indicate that the manufacturer has locally encapsulated a bare die and associated interconnects, but this appearance will not provide an identification of the die. It may not even prove that every covered circuit uses the same topology.

What you can observe:

There will be a well-defined area of the board covered with resin.

Traces or pads lead toward the covered area.

No separate, marked package body is visible at that position.

What you may infer:

A protected die, wire-bond region, or another local interconnect structure may exist beneath the black blob.

The resin that you can see may serve to protect the covered area just as board-level encapsulants do.

What you cannot prove by sight:

The manufacturer’s name or part number, circuit function, number of dies, or actual topology.

Whether the area is electrically functional, capable of repair, or replaceable.

Whether a visually similar blob contains COB, another type of protected assembly, or several different circuit elements.

Board records, schematics, controlled bills of materials, manufacturing data, or known-good comparisons will provide better evidence than visual observations. Exposing the area can destroy the die’s fine interconnections and erase useful evidence, so visual identification should stop before becoming a decapsulation procedure.

What Changes When the IC Package Is Removed?

Bare-die handling, bonding, protection, verification, thermal-path, and rework decisions then shift into the substrate design and assembly. The result will depend upon several factors, such as the exact die, materials used, physical topology, and process rather than on COB alone.

The Texas Instruments Application Brief, SBOA337, includes an example of a Photodiode and Transimpedance Amplifier design using Bare Die Wire Bonding.

The engineered solution in this design addresses the circuit’s parasitics and size. The result is design-specific rather than a universal advantage of COB technology.

The timing of verification changes due to the protection of the chip and final assembly. Certain features are easier to verify before encapsulating the chip, while other checks belong after protection or final assembly.

Several factors, including metallization, cleanliness, planarity, exposure to moisture, cure profile, acceptance criteria, and test access must be consistent with the exact die, substrate, environment, and documentation of the controlled process for each product.

Where Is Chip on Board Used?

Microchip’s microelectronic assembly capabilities include die attach, wire bonding, flip-chip, and encapsulation for the industrial, communications, and medical markets; COB technology is also widely used for LED and compact custom modules.

Consider a wearable sensor for health monitoring. The design brief can call for a fingernail-sized footprint, a slim overall thickness, and a die positioned close enough to the skin-contact electrodes to minimize the length of the signal path. Fitting a fully packaged integrated circuit into that space can be difficult even before accounting for battery and antenna space, which is why COB can be used in this type of application, as the bare die and its wire bonds can occupy less the board area required by a packaged part.

What PCB Design Details Matter for COB?

A COB PCB needs to accommodate die attachment, die-level interconnection, die protection and inspection; not just a component footprint like that seen in most standard packages. When designing a COB PCB, the bond-pad ring surrounding the die area needs to be constructed with a wider keep-out, due to the wire loop, dispense boundary for encapsulation, and any necessary test points needing to fit into this relatively small area without overlapping. An incorrectly sized keep-out can be a reason for needing to modify and update a COB PCB prior to assembly.

How Is a Chip-on-Board Assembly Made?

Each phase will be determined by the topology and product selected, which affects the materials used and the processes.

1. Prepare the Substrate and Die: Make sure that you have the right die, positioned in the right orientation, with the correct bond pad regions, surface finish, flatness, cleanliness controls, and controlled process inputs.
2. Attach the Die: Use the selected conductive or non-conductive attachment system to place and secure the die, and then complete any required attach verification or cure.
3. Create the Electrical Interconnect: In a classic wire bond COB, the interconnect connects the die pads to the substrate pads; in a flip chip COB, the interconnect uses bumps or direct contacts that go under the die and may also require underfill.
4. Inspect or Test at the Appropriate Stage: Access to wire bonds and die edges should be maintained prior to protection; some flip chip assemblies use microfocus X-ray for inspection and sample die shear or cross-section checks along with electrical testing.
5. Apply Protection as Necessary: Use a qualified glob-top, dam-and-fill, underfill, cover, or other protection system with controlled coverage and cure.
6. Verify the Completed Assembly: Confirm that your defined electrical, mechanical, visual and process results have all been achieved for that product.

What Can Go Wrong in a COB Assembly?

What Does COB Mean in LED Lighting?

COB in LED lighting applies the same direct-die principle to a light-emitting module. Lumileds’ Understanding CoB LEDs provides information relating to multiple bare LED chips mounted closely together on a thermally efficient substrate and covered by a common phosphor system. Since the individual LED chips do not require their own leadframes, phosphor coating, or lenses, the distance between individual dies can be reduced sufficiently to produce higher light density from a smaller source area.

Conversely, an SMD LED consists of an individually packaged device separately provided as a component for a board or circuit. A COB LED combines multiple bare dies at the module level and provides a common phosphor layer which can simplify optical integration and improve source uniformity. Rather than being inherently brighter, more energy efficient, longer-lasting, cooler, or easier to repair, the performance of COBs is determined by the chips, drive conditions, optics, substrate, thermal path, protection, and application.

Conclusion: Identify the Boundary, Not Just the Blob

When identifying COB, you must answer five questions: What is being mounted? Where is the die attached? How is it electrically connected? Where is it protected? And finally, is the die on the substrate surface or inside the board structure?