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Advanced PCB Manufacturing Service
Advanced PCB Technologies for Complex Bare-Board Fabrication
SUGA helps OEM teams define and quote advanced bare-board PCB requirements when HDI, rigid-flex, heavy copper, RF laminate, via-in-pad, back drilling, or cavity features change fabrication scope.
Advanced PCB Manufacturing Areas
Define the manufacturing area by the first bare-board fabrication method that will differ from standard. The name advanced PCB is too generic to compare quotes; the choice of an area should be based on the type of requirement that has the greatest impact on the first non-standard fabrication task.
HDI & Any-Layer PCBThe type of microvia stackup, sequential lamination, dense interconnections, or any-layer configurations will determine the first fabrication decision.
Rigid-Flex & FPCThe geometric configuration of the bend zone, coverlay openings, stiffeners, and transitions from rigid to flexible also establish the largest risk.
Heavy Copper PCBHeavy copper, thermal copper, local copper buildup, or high-current paths affect etching, plating, resin flow, and panel handling.
Rogers & PTFE RF PCBThe behavior of low-loss laminates and the stability of RF stackups will determine the material path based on Dk/Df targets and hybrid material pairing.
Embedded Component PCBThe manufacturing process of the bare board is affected by buried passives, cavity structures, recessed component areas, or pocket depth used in the design.
Bare-Board Fabrication Constraints That Define Advanced PCB Work
Each advanced PCB technology should be linked to the fabrication anchor that changes quotation scope, such as microvia aspect ratio and depth, finished copper weight, RF laminate Dk/Df, impedance tolerance, back-drill stub residuals, or cavity depth defined by the drawing.
The above anchors provide an industry planning reference or specific material data points that also require verification based on the fabrication drawings, stackup, material specifications, or order requirements. Therefore, they will not automatically constitute a SUGA commitment for each build.
Advanced PCB Technology Triggers and Planning Anchors
| Technology | Planning Anchor | Trigger | Confirming File | Quote Line |
|---|---|---|---|---|
| HDI microvia | AR <=1:1; depth <=0.25 mm reference | blind / buried / stacked / staggered vias | stackup + drill chart | laser drill; seq. lamination; microsection |
| Rigid-flex | bend radius drawing-defined | rigid-to-flex bend zone | flex stackup + bend drawing | coverlay; stiffener; flex tooling |
| Heavy copper | >3 oz/ft2 trigger; 4 oz+ often heavy-copper range | local copper / power zone | copper note + map | etch compensation; resin fill |
| Rogers / PTFE RF | RO4003C Dk 3.38±0.05, Df 0.0027; RO4350B Dk 3.48±0.05, Df 0.0037 @10 GHz | low-loss laminate / Dk-Df callout | material spec + stackup | material approval; substitution limit |
| Controlled impedance | +/-10% common; +/-5% needs early agreement | target ohms + tolerance | impedance table + coupon | coupon fabrication; time-domain reflectometry (TDR) |
| Back drilling | residual stub <=10 mil common target | stub limit / start-stop layer | back-drill table | depth inspection |
| Via-in-pad | fill / cap / planarity must be called out | via under component pad | fabrication drawing | fill; cap plating; pad-flatness check |
| Cavity / embedded | depth / clearance drawing-defined | cavity / pocket / buried feature | cavity drawing | machining; depth check |
Microvia Stackup and Sequential Lamination
Microvia structures will differ from a standard build when the dielectric thickness, via diameter, and stackup sequence are applied to the microvia, which will push them toward the limits of the HDI manufacturing process. A typical planning reference for microvia maximum aspect ratio should not exceed 1:1, with 0.25 mm depth maximum; for tighter project limits, the fabrication drawing and approved stackup should provide these limitations.
Bend-Zone Geometry and Rigid-Flex Transition
Unconfirmed bend-zone details can affect tooling before a rigid-flex panel is built. Tools that are built without the required bend-zone copper patterns or coverlay clearance may have an increased risk of copper fatigue due to shifting necessary manufacturing operations into later clarification rounds.
Copper, RF Laminate, and Impedance Control Requirements
Heavy copper, RF laminate, and controlled impedance products must be quoted with a clear numeric anchor for the quote. Due to variations among fabricators, copper that exceeds approximately 3 oz/ft2 is treated as a heavy copper trigger; however, some manufacturers may separate 4 oz/ft2 and higher copper into a separate heavy copper range. Furthermore, when specifying RO4003C and RO4350B materials, both materials must be provided with their respective Dk and Df values, and controlled impedance must specify the target ohm range and tolerance for the products. All numeric anchors must remain conditional to the purchase order, drawing, or stackup for each unit produced.
Project Files That Define Advanced PCB Fabrication Scope
To properly define the scope of an advanced PCB fabrication project, the main comparison rule should be clear. Quotes from two suppliers for the same board may show similar unit pricing; however, the two quotes are likely not covering the same complete sets of manufacturing processes. Therefore, the project files should show whether the prices quoted include lamination steps, unique drilling, laminate approval, coupon fabrication, etc., or if the price quoted is for only the base board build.
To locate the missing quoted price section of the project file, check to see if the stackup is included; if not, sequential lamination may not have been included in the quoted price. If the drill map does not separate blind holes, buried holes, mechanical holes, and laser-drilled holes, the drill map may be incomplete. If the via-in-pad note is not provided, filling, cap plating, or pad flatness checks may stay outside the quoted scope.
Gerber, Drill, and Stackup Data
The Gerber data specifies where the copper geometry, pad openings, and spacing conditions will be placed; the drill file separates plated, non-plated, buried, and blind holes. A drill file that does not include the hole types can also misrepresent whether a part requires laser drilling or stacked-via drilling.
The stackup drawing will also define how the stack of layers will be arranged within the board, the dielectric layer build, the orientation of the copper build, and how and when they will be laminated into the multilayer board build.
Microvia pricing for multilayer boards may be quoted under a general multilayer board quotation if the stackup drawing and drill data do not include how the layers will be laminated together to form the multilayer board build.
Material, Impedance, and Copper Notes
Materials used, impedance levels, and copper thicknesses will help determine how the multilayer boards should be manufactured. When specifying which material to use in a laminate stack, you should identify whether the material is a low-loss laminate, a PTFE hybrid stack, or a controlled dielectric build type of laminate.
If you do not specify the type of material, one offer may use an available substitute while another may include the cost of obtaining the requested laminate.
When quoting for impedance, many quotations use around +/-10% of the specified value for controlled-impedance tolerances, while tighter tolerances, such as +/-5%, will typically require early agreement before pricing is finalized.
If you are quoting for finished copper thicknesses of approximately 3 oz/ft2 or more, discuss this before the production quotation is finalized.
Netlist and Bare-Board Test Basis
A netlist or E-test file supplied by a customer forms the basis against which a bare board can be electrically tested. A netlist does not comprise an entire set of tests; however, it defines how connectivity to the bare board will be validated prior to acceptance. If no netlist is provided, electrical tests may still be performed, but the comparison file, report format, or acceptance criteria may remain undefined.
When the netlist and E-test files provide a complete set of files, the engineering and sourcing personnel can evaluate the offered coverage instead of comparing unit pricing alone.
RFQ Files That Set PCB Manufacturing Decisions
| RFQ File | Data to Check | Manufacturing Decision | Resulting Evidence | Quote Consequence |
|---|---|---|---|---|
| Gerber data | Copper geometry and pad openings | Copper clearance and annular ring checked against fabrication notes | CAM clarification list | Non-standard copper rules retained in quote text |
| Drill file | Plated, non-plated, blind, and buried hole codes | Drilling and plating sequence determined by hole type | Drill classification log | Laser drilling or stacked-via work separated from mechanical drilling |
| Stackup drawing | Layer order, dielectric, and copper build | Lamination sequence fixed before build review | Approved stackup drawing | Sequential lamination treated as separate fabrication content |
| Fabrication drawing | Board notes, tolerance callouts, and finish | Drawing-defined rule controls tolerance assessment | Fabrication note response | Special tolerance notes carried into manufacturing terms |
| Material specification | Laminate family and performance callout | Laminate sourcing path selected | Material approval record | Special laminate sourcing set before laminate commit |
| Impedance table | Net class and target tolerance | Coupon plan and report content selected | Impedance test plan | Coupon fabrication and TDR evidence separated from base E-test |
| Copper weight note | Finished copper and local copper build | Etching and plating demand grouped by copper area | Copper build record | Copper distribution affects panel use and plating work |
| Surface finish requirement | electroless nickel immersion gold (ENIG), organic solderability preservative (OSP), hot air solder leveling (HASL), immersion silver, or immersion tin | Solderability and storage condition matched | Finish confirmation record | Shelf-life handling stated in quote terms |
| Netlist or E-test file | Connectivity data for bare-board test | Supplied netlist sets E-test comparison basis | E-test comparison report | Bare-board test basis fixed before acceptance |
When the PCB design files contain missing items, final pricing may change because a required obligation falls outside the base price. If an impedance table or filled-via note is missing, coupon fabrication or TDR reporting can fall outside base pricing. If the netlist is missing, the test requirement turns from a specific statement into a generic statement instead of a comparison report.
Advanced PCB Capabilities by HDI, Rigid-Flex, Heavy Copper, RF, and Embedded Features
A high-density board may consist of HDI microvias, rigid-flex construction, controlled impedance, heavy copper, RF laminate, and via-in-pad configurations; therefore, the first question is which high-value item is missing from the quotation. Then connect that question to the file or measurable target.
When ranking the omission of items for quotations, SUGA can provide a ranked list of the type of line item that will have the highest probability of changing quoted responsibility. For instance, microvia lamination, filled via-in-pad, RF laminate approval, bend-zone construction, back-drill depth, cavity machining, or impedance coupon data. The ranking does not replace the drawing; it requires clarification of the technical answer before pricing can be compared to other offers.
Rank the First Missed Operation
The first missed operation should be ranked highly, based on the fact that removing that item may change responsibility the most. For example, in a BGA breakout, it can be assumed that filled via-in-pad will be more important than the BGA label. In the case of a high-speed design, the back-drill residual stub target, such as 10 mil or less, may be of higher importance than a general back drilling note. Laminate approval may be more important in an RF stackup before line-width tuning begins.
Therefore, an ordered practical sequence is as follows: build sequence, solderable land condition, material approval, mechanical geometry, acceptance data. When comparing two different price proposals from fabricators, it is critical to examine whether the two have similar levels of commitment to responsibilities, including whether impedance coupon fabrication and TDR reporting are included in the quoted scope. If one proposal contains TDR data and coupons while the other does not, the two proposals may carry different responsibilities. Therefore, if you receive two prices that are just three percent apart, you cannot assume that the pricing reflects equivalent levels of commitment.
Resolve Capability Collisions Before Unit Price Comparison
Both offers should identify capability collisions before production pricing is compared. Capability collisions should be documented and categorized as engineering conflicts. For example, a printed circuit board designed for and manufactured using fine-pitch components may require more soldering heat balance due to the presence of excessive copper adjacent to the solder pads. In addition, a board using RF laminate will have a different dielectric model than one designed using standard FR4 laminate. In the same manner, in a rigid-flex board, a high-speed trace may traverse a bend-zone stackup that was not verified to be within design specifications.
Ask for the Named Quotation Line
When dealing with capability collision issues, it is critical to ask for the named quotation line in order to fully understand the impact of the engineering conflict. The affected operation should be identified. For example, for heavy copper, the offer should state the copper compensation needed near fine pitch. A laminate used inside a hybrid stackup should be identified. For RF or low-loss laminate, the approved material family should be specified. A via-in-pad should also have the fill type, cap plating, and planarization specified in the offer.
Fabrication Risks That Affect Advanced PCB Quotations and Assembly Readiness
Advanced PCB manufacturing can include stacked microvia, filled via-in-pad lands, back-drilled vias, RF hybrid stackup, and heavy copper material. Each of these item types can have an impact on what the assembler receives when the board moves from fabrication to assembly. The handoff should identify the type of output received in terms of a microsection report, filled-via inspection result, back-drill depth result, material approval, TDR data, or netlist-based E-test comparison.
Microvia and Sequential Lamination Acceptance
The reliability of a microvia depends on the dimensions of the via as well as the dielectric thickness of the material used for the buildup. The layered structure should follow the approved stackup and drawing requirements. If the design approaches a 1:1 microvia aspect ratio or uses stacked structures, the manufacturer should be asked whether microsection sampling and via-interface verification are included.
Via-in-Pad, Heavy Copper, and Soldering Conditions
Filled and capped via-in-pad structures affect the surface area available for soldering on the PCB, especially for the solderable land surfaces. If you do not include fill, cap plating, or planarization in the price quote, there is a risk that solder paste will be lost or that pad flatness will be affected. There is also a measurable handoff issue associated with heavy copper; finished copper having a weight of approximately 3-4 oz/ft2 and above will impact the copper balance, thermal mass, and review of the soldering process.
Back Drilling, Impedance, and Fixture Planning
Back drilling and impedance control are both based on measurable criteria. Measurable criteria include information on the length of the residual stubs, the layer pairs used, target impedance values, and acceptable tolerances, typically +/-10%. When these items are defined, the requirement can be priced, and the delivery can be confirmed. However, if these items are missing, the board might pass basic connectivity testing but will not have high-speed acceptance data.
Fabrication Risks and Inspection Outputs Before Assembly
| Risk Item | Missing Input | Inspection Output | Anchor | Assembly Risk | Quote Scope |
|---|---|---|---|---|---|
| Microvia interface | stackup / dielectric / via diameter | microsection + via-interface check | AR <=1:1; depth <=0.25 mm reference | bare-board defect reaches PCBA | microsection may be excluded |
| Via-in-pad land | fill type / cap / planarity note | filled-via inspection + cap status | drawing-defined; no default promise | paste loss or pad flatness risk | filling may be outside drilling |
| Heavy copper zone | finished copper / copper map | copper build + resin-fill response | about 3-4 oz/ft2+ trigger | thermal mass affects profile review | etch / resin work may be extra |
| RF laminate substitution | exact laminate / substitute list | material approval + COC basis | RO4003C / RO4350B Dk-Df must match design | RF or impedance model shifts | special laminate approval may be extra |
| Controlled impedance | impedance table / tolerance / coupon | coupon plan + TDR report | +/-10% common; tighter needs agreement | high-speed data missing | coupon / TDR may not be priced |
| Back-drilled via | stub limit / target layer / span | depth inspection result | <=10 mil stub target when specified | residual stub SI risk remains | secondary drilling may be excluded |
| Rigid-flex bend zone | coverlay / stiffener / bend radius | bend-zone drawing response | drawing-defined bend data | fit or fatigue risk moves downstream | flex tooling may be separate |
| Cavity / pocket | depth / clearance note | cavity depth result | drawing-defined depth target | component fit risk remains | machining may be separate |
| Netlist E-test | netlist / IPC-D-356B data | E-test comparison report | netlist basis, not in-circuit testing (ICT) / functional testing (FCT) coverage | connectivity basis unclear | generic electrical test only |
If the required output is not named, the quotation may not include the data needed for assembly handoff or high-speed acceptance.
Standard Use Limits in Advanced PCB Fabrication Work
When IPC-A-600M is referenced on the fabrication drawing to determine if a bare board is acceptable, this is the benchmark for that specific PCB, but not necessarily for all PCBs. Therefore, a fabrication drawing that has an IPC class listed does not automatically include assembly workmanship requirements or automatic Class 3 work.
Other references for PCB fabrication use the same method to establish limits. IPC-D-356B references the data format used for performing a bare-board electrical test. UL 796 is tied to printed wiring board recognition requirements. UL 94 is tied to material flammability classification. As with all reference documents, there should be a drawing, order, netlist, material declaration, or quality plan condition before the reference becomes part of the quotation.
Bare-Board Standards and Fabrication Evidence
Bare-board fabrication standards are tied to drawings, material calls, netlists, or inspection reports. IPC-A-600M may establish the acceptable level for inspections using either visual or microsection inspection methods when specified. IPC-6012F may establish rigid board qualification or performance criteria when stated. IPC-D-356B provides the format for documenting bare-board electrical test data but does not guarantee full test coverage.
PCBA Limits and Misread Standard Claims
PCB standard references do not replace assembly and solder-joint workmanship criteria, assembly processes, functional testing, or fixture accessibility. When an order includes the need for PCBA-level documented evidence, that specific requirement shall be addressed independently from the fabrication reference of the bare board.
Standard Use Limits for PCB Fabrication Work
| Standard or Reference | Governed Item | Trigger Condition | Evidence Basis | Client Requirement Use | What It Does Not Prove | PCBA Limit |
|---|---|---|---|---|---|---|
| IPC-A-600M | bare-board acceptability | visual or microsection acceptance required | inspection report or microsection result | acceptability checked against requested class | automatic Class 3 acceptance | not PCBA solder-joint workmanship |
| IPC-6012F | rigid PCB qualification and performance | rigid board performance requirement stated | approved drawing or quality plan | annular ring, plating, and microvia criteria tied to drawing | universal process promise | not assembly workmanship rule |
| IPC-2221C | generic printed-board design reference | design rule, clearance, or material selection reference requested | design rule note or fabrication drawing | spacing, material, or design rule checked as reference | manufacturing acceptance by itself | not PCBA process standard |
| IPC-4101E-WAM1 | laminate and prepreg specification | laminate family stated | material specification or certificate of conformity | material callout compared to laminate requirement | proof of all material properties | not soldering acceptance basis |
| IPC-D-356B | bare-board electrical test data format | netlist test data supplied | IPC netlist or E-test file | netlist comparison uses supplied format | test coverage percentage | not ICT or FCT coverage |
| UL 796 | printed wiring board component recognition | UL-recognized board requirement stated | UL marking record or order requirement | board recognition checked at order level | finished-product approval | not PCBA safety approval |
| UL 94 | material flammability classification | flammability rating stated | material declaration or laminate data | material rating recorded for specified build | board-level capability alone | not assembly fire testing |
Keep each reference tied to the file or order condition that activates it. A drawing note, netlist, UL requirement, material declaration, or quality plan should define which item is governed, allowing the correct inspection, material, or test output instead of treating the standard as a broad statement.
Prepare Complete Project Files for Advanced PCB Quote Review
When preparing files for advanced PCB quoting, it is best to provide both the manufacturing process and the numeric or drawing-based triggers associated with the manufacturing process.
Before requesting a quotation, you need to have the files that specify your build requirements. These files are as follows: BOM, Gerber data, drill files, stackup drawing, fabrication drawing, material specification, impedance table, copper notes, surface finish requirement, netlist or E-test file, quantity, IPC class when specified, and test requirements. If you plan to have the PCB assembled after fabrication, you must also provide the centroid file and assembly drawing so that the assembly of the boards will not create conflicting decisions for downstream planning or inspection.
A package does not mean all answers are final; however, it should be complete enough for suppliers to separate confirmed requirements from unresolved assumptions. If the stackup is not approved, state that. If laminate can be substituted, state what laminate family will be acceptable. If you require controlled impedance, microsection reporting, TDR data, filled-via processing, or special storage conditions, these must be documented prior to making price comparisons.
A quotation should clarify three things: the manufacturing step that changes the board build, the numeric or drawing-based trigger associated with that manufacturing step, and the inspection output that will be available before assembly occurs.
Upload BOM & Gerber
Share your BOM, Gerber, centroid, quantity, IPC class, and test requirements before requesting a quote.
Frequently Asked Questions
PCB, printed circuit board, refers to the base board before component assembly takes place. Advanced PCB work examines the actual physical features of the base board, materials, fabrication requirements, copper distribution, and acceptance documentation needed to support performance and reliability requirements.
The most frequent issues associated with PCBs include open circuits, short circuits, insufficient annular rings, copper plating problems, registration shifts, solderability issues, surface finish problems, and incorrect or mismatched materials. In higher-value advanced PCBs, there are more relevant questions related to when or why the information contained in a file or inspection report will prevent these issues from being identified too late in the manufacturing process. Microvia risk relates to microsection data; via-in-pad risk relates to fill, cap plating, and planarization.
The primary methods of PCB testing include visual inspection, automated optical inspection (AOI), X-ray inspection, flying probe testing, ICT, functional testing, and bare-board electrical testing; however, the above methods do not have all of the same types of evidence. Flying probe and electrical testing can be associated with bare-board connectivity, whereas ICT and functional testing typically apply to assembly-level validation and include a defined testing program. If the netlist, impedance table, coupon specification, or TDR report is missing from the inspection report, then the bare-board test may have been quoted without the reports needed for impedance or high-speed acceptance. A typical target tolerance for controlled impedance is +/-10% unless otherwise stipulated in the early stages of a project.
The three H rule in PCB is a spacing-related design guideline that addresses electromagnetic coupling. It is not a claim of fabrication capacity, so if your project is going to depend on a specific spacing rule, controlled impedance requirement, or high-speed design assumption, these should all be documented in the PCB stackup, fabrication drawings, or design notes so the fabricator can properly evaluate them against the actual board structure.
The three W rule in PCB is also a spacing guideline from the design side, primarily discussed in terms of crosstalk control between traces, and should not be substituted for an entire impedance table, stackup drawing, or net-class requirement. The completed design package must document the trace geometry, dielectric structure, impedance targets, and acceptance requirements in order for the fabricator to review it.