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PCB and PCBA Quality Control & Compliance
Carry Quality Controls From Bare Board Fabrication Through PCBA Acceptance
Incoming material checks, optical inspections, X-ray, electrical testing and FCT, traceability, and compliance are coordinated with one or more manufacturers before shipment. All results are linked to their respective board revisions, production lots, and shipment records.
PCB and PCBA Quality Control From Files to Shipment
PCB vs. PCBA Quality Control
A sound electronics manufacturing QC system must detect defects at the point when materials, panels, boards, component lots, and programs can still be isolated from other parts of the manufacturing process. IQC establishes that materials have the specified identity and condition before use; IPQC detects and isolates manufacturing process drift; and FQC establishes that the completed production lot meets the manufacturer’s acceptance criteria.
When referring to PCB and PCBA, PCB denotes only the bare board. PCB QC includes fabrication data, stack-up, material, dimensions, plated structures, conductors, solder mask, surface finish, electrical continuity, and cleanliness. PCBA QC encompasses PCB QC plus the aspects added by component placement and soldering, including placement accuracy, polarity, workmanship, hidden joints, circuit integrity, firmware, interfaces, and powered behavior. PCB and PCBA are connected production stages, but one acceptance result cannot substitute for the other.
QA and QC Across Production
QC performs and records checks during PCB and PCBA production. QA verifies that all aspects of QC, such as the sampling basis, acceptance standards, nonconformance resolution, and final acceptance decisions, are consistent with the manufacturer’s specifications. No pass/fail conclusion can support accurate containment after shipment without a link to the PCB revision, work order, lot, test program, and applicable acceptance limits.
IQC, IPQC, FQC, and FQA procedures apply differently across PCB fabrication and PCBA manufacturing. In PCB fabrication, IQC covers incoming laminates, copper foil, prepreg, chemicals, and other incoming materials; during PCBA production, IQC covers fabricated bare boards, components, packaging condition, lot or date code, and approved component data; IPQC monitors active process conditions; FQC confirms the integrity of finished products; and FQA evaluates the complete manufacturing evidence before release.
What Connects Engineering Files to Shipment Records?
Engineering assessment establishes design manufacturability, the governing acceptance class, critical features, inspection coverage, test limits, and reports required before production. The accepted material subsequently moves through the fabrication or assembly process, followed by the optical, structural, electrical, functional, or reliability checks required by the released documents.
Final acceptance connects the order to records for the board revision, material lots, circuit board lots, component lots, production inspection results, test program revisions, production nonconformance resolution, and report IDs associated with the shipped quantity. This relationship allows a future issue to be narrowed to the specific board revision, material lot, manufacturing window, board location, serial number, or shipment instead of treating all orders as affected.
PCB Quality Inspection and Testing
Inspection
Inspection
Inspection planning by manufacturing stage, product geometry, defect risk, and required evidence.
3D Solder Paste Inspection
Paste volume, area, height, position, and deposit uniformity before component placement.
3D Automated Optical Inspection
Visible placement, polarity, solder workmanship, component height, and coplanarity indications.
X-Ray Inspection
Hidden solder structure, BGA/QFN/LGA geometry, internal bridges, missing balls, voids, and through-hole fill.
First Article Inspection
The first completed assembly against the released BOM, centroid data, polarity information, drawings, and test program.
Visual Inspection
Visible workmanship, markings, contamination, damage, rework condition, and final appearance requirements.
Testing
Testing
Test selection according to bare-board connectivity, assembled-circuit access, powered behavior, and required coverage.
Flying Probe Testing
CAD-driven electrical checks without a dedicated bed-of-nails fixture.
In-Circuit Testing
Accessible nets, component values, opens, shorts, polarity, and manufacturing faults through a dedicated fixture and program.
Functional Testing
Powered response, interfaces, firmware behavior, load response, protection functions, and intended operation.
Manufacturing Defect Analysis (MDA) Testing
Manufacturing defects such as opens, shorts, component values, and orientation without proving full product operation.
Electrical Testing
Bare-board continuity and isolation, failed-net evidence, and specified resistance or connectivity limits.
Design Review
DFM and DFT Review checks whether the released files support the proposed fabrication process, component geometry, physical and logical test access, fixture design, required coverage, and measurable acceptance limits before manufacturing or test-program preparation begins.
PCB Manufacturing Quality Control
| Control Item | Controlled Requirement | Failure Mode | Verification Method | Acceptance Record |
|---|---|---|---|---|
| Engineering data | Released fabrication data, stack-up, material, copper definition, hole schedule, surface finish, tolerances, impedance, repair restrictions, and test requirements. | File conflict, missing criterion, obsolete revision, or an incompatible feature combination. | Fabrication-data and requirement review. | Revision-linked fabrication requirements. |
| Material and lamination | Approved laminate and prepreg identity, dielectric construction, copper definition, Tg or thermal requirement, and lamination plan. | Wrong laminate, dielectric variation, resin void, delamination, copper-adhesion loss, or excessive Z-axis expansion. | Material identity check, microsection, thermal stress, copper adhesion, and thermal-property verification as specified. | Material lot, lamination, and structural evidence. |
| Drilling and plating | Finished-hole requirement, hole type, annular ring, aspect ratio, desmear, hole-wall copper, via fill, and applicable class. | Hole-size or position error, reduced annular ring, wall damage, blocked hole, thin copper, void, or discontinuity. | Hole inspection, copper-thickness measurement, backlight, X-ray where applicable, and microsection. | Hole, plating, coupon, or microsection report. |
| Conductors and solder mask | Released line width and spacing, conductor repair restrictions, solder-mask material, cure, clearance, and registration. | Over-etch, under-etch, width or spacing violation, mask lift, pad encroachment, exposed conductor, or unauthorized repair. | AOI, conductor measurement, cure verification, and registration inspection. | Conductor and solder-mask result. |
| Dimensions and warpage | Drawing-controlled outline, slot, V-cut, thickness, bow, twist, and local mechanical limits. | Assembly misalignment, enclosure interference, printing instability, placement error, BGA stress, or connector misfit. | Dimensional inspection and bow-and-twist measurement using the specified method. | Dimensional and flatness report. |
| Electrical and structural integrity | Netlist, isolation and continuity limits, controlled impedance, internal alignment, plated structures, and solderability requirement. | Open, short, resistance or impedance deviation, internal structural defect, or solderability failure. | Flying probe or fixture test, four-terminal sensing when required, impedance test, microsection, and solderability verification. | Electrical, impedance, structural, or solderability report. |
| Cleanliness | Visual and contamination limits defined by the product, cleaning process, coating plan, and acceptance specification. | Leakage, corrosion, electrochemical migration, dendritic growth, or coating-adhesion failure. | Visual, ionic, or other specified contamination test. | Cleanliness and final-inspection result. |
Capability Limits Do Not Automatically Coexist
SUGA-managed production can support high-layer-count, fine-hole, and special heavy-copper constructions, including individual feature windows such as up to 40 layers or copper structures approaching 1000 μm for selected busbar, copper-coin, embedded-copper, or other specialized designs. These values are not assumed to coexist on one conventional FR-4 board. Layer count, copper formation method, minimum feature size, hole geometry, board thickness, via structure, material system, and inspection access must be reviewed together.
Material and Lamination Control
Material identity alone does not prove that lamination produced a sound internal structure. Microsections can reveal dielectric thickness, resin fill, copper adhesion, internal alignment, plated structures, and voids that are invisible at the outer surface. Thermal stress adds a different challenge by exposing weak bonds between laminate, resin, and plated structures.
Tg and thermal expansion must suit the assembly profile and operating stress. A laminate with insufficient thermal performance can expand excessively in the Z axis during reflow or later temperature cycling, weakening plated holes or producing delamination. The accepted material lot, lamination record, and thermal or structural result therefore belong to the same decision chain.
Hole, Plating, and Annular-Ring Acceptance
Nominal drill diameter is not enough. Positional error can reduce the annular ring even when the finished hole passes a size check, while smear, debris, voids, or insufficient hole-wall copper can leave the interconnect electrically unstable. The released drawing and applicable IPC-6012 class should define the hole type, finished size, annular-ring requirement, average and local copper basis, coupon location, and measurement method.
A microsection represents the specified coupon or sampled location; it does not automatically prove every hole on every panel. High-aspect-ratio holes, stacked or filled microvias, backdrilled structures, and locally dense copper areas may require additional coupon design, X-ray registration evidence, process monitoring, or expanded sampling.
Dimensions, Surface Finish, Solderability, and Flatness
Routing, V-cut, slot, thickness, surface finish, and solderability checks determine whether the bare board can enter assembly without causing mechanical or wetting problems. Bow and twist must be judged against the released drawing and applicable fabrication criterion; boards carrying fine-pitch packages, BGAs, or large connectors may need tighter flatness than a through-hole-only design.
A dimensional pass does not establish solderability, and a solderability pass does not prove dimensional alignment. Separate results are retained when both conditions form part of acceptance.
PCB Assembly Quality Control
Assembly controls should identify printing, placement, soldering, hidden-joint, electrical, and powered-function defects before later operations conceal them or make rework more damaging.
| Process Stage | Input / Inspection Object | Process Control / Inspection Item | Release Output |
|---|---|---|---|
| Assembly engineering | Gerber, BOM, centroid data, drawings, polarity data, test requirements, and approved substitutions. | Stencil, placement, reflow, inspection, test, and acceptance criteria. | Released assembly requirements. |
| IQC | Components, bare PCBs, approved manufacturer data, and packaging information. | Part number, value, quantity, lot/date code, package condition, moisture sensitivity, polarity marking, and PCB condition. | Accepted and traceable material lot. |
| Paste print and SPI | Approved stencil, solder paste, printer program, support tooling, and bare PCBs. | Paste volume, area, height, position, aperture release, uniformity, and trend drift. | Accepted solder-paste deposit. |
| Placement | Printed PCBs, feeder setup, approved placement program, nozzle plan, and component data. | Identity, value, orientation, polarity, position, package, coplanarity, and placement force. | Verified placement before reflow. |
| Reflow and AOI | Placed assembly, approved paste, thermal profile, and support condition. | Preheat, soak, time above liquidus, peak temperature, visible solder formation, component movement, and polarity. | Controlled solder result and visible-workmanship evidence. |
| FAI | First PCBA, BOM, centroid data, polarity information, schematic, drawings, and approved test program. | Component identity, value, orientation, solder condition, program revision, and selected electrical or functional results. | Approved first article before lot continuation. |
| X-Ray Inspection | Hidden joints, package geometry, through-hole fill, and defined acceptance criteria. | Voids, bridges, missing balls, misalignment, insufficient fill, and hidden structural anomalies. | Hidden-joint result linked to board or lot. |
| Electrical Test | Netlist, accessible nodes, limits, fixture or probe program, and board identity. | Continuity, isolation, resistance, component values, polarity, and specified circuit relationships. | Electrical test result with failed-net detail when applicable. |
| FCT | Powered assembly, firmware or configuration, load, interfaces, functional limits, and safety controls. | Outputs, communication, current draw, load response, protection behavior, firmware response, and intended operation. | Functional acceptance result. |
| Final inspection and release | Completed inspection, test, rework, concession, and lot records. | Workmanship, markings, cleanliness, rework condition, report completeness, revision, and lot identity. | Accepted PCBA lot linked to shipment records. |
Incoming Component Control
Moisture-sensitive packages require packaging, desiccant, humidity-card, exposure-time, storage, baking, and handling controls because damage may only appear during reflow. Polarity-sensitive parts create a different failure path: the received part can be genuine and correctly labeled, but the approved orientation data, package marking, feeder setup, and placement program may still disagree.
Alternative manufacturer parts, date-code restrictions, component programming, and customer-supplied materials must be identified before line release. A functional pass on one sample does not automatically authorize an unapproved substitution across the lot.
Solder Paste and Placement Control
Stencil thickness is selected for the package mix and required paste transfer. A common production range may be 4-8 mil, but fine-pitch apertures, stepped stencils, large thermal pads, shield cans, and heavy connectors can require different local thickness or aperture treatment. Paste condition, printer alignment, aperture release, and board support act together; SPI values only become useful when they are compared with defined limits and process trends.
Board support, nozzle selection, coplanarity, placement force, component mass, solder volume, and thermal balance must suit the actual geometry. A line can place a large connector accurately and still produce an unstable joint if support, paste volume, pin coplanarity, or heat distribution is wrong.
Reflow and First-Article Control
The thermal profile must suit the paste, board construction, copper distribution, package mass, moisture sensitivity, and component temperature limits. A visually acceptable profile on one location does not prove that a dense BGA region and a heavy connector reached the same soldering condition.
The first completed assembly is checked against the released BOM, centroid data, polarity information, assembly drawing, and approved test program. This can identify wrong values, reversed components, outdated programs, incorrect feeder assignments, or configuration errors before the full lot continues. If the first article fails, production resumes only after the verified cause is corrected and the affected checks are repeated.
Final Assembly Acceptance
Final release connects workmanship, required X-ray results, electrical and functional evidence, revision, lot identity, concessions, and reinspection after repair. Visible workmanship cannot confirm hidden solder structure, circuit integrity, firmware, or powered behavior. A repaired area returns to every inspection or test that could have been affected by the repair, not only to the method that found the original defect.
How Are Inspection and Test Methods Selected?
Method selection starts with the condition that must be confirmed: paste deposition, visible workmanship, hidden structure, bare-board connectivity, assembled-circuit values, or powered behavior. No single method confirms all of these conditions. AOI cannot prove hidden BGA structure or circuit continuity; X-ray cannot prove firmware behavior; continuity cannot prove load performance; FCT cannot establish every visible workmanship condition.
Coverage follows defect risk, manufacturing stage, physical access, product class, drawing requirements, and the acceptance result required by the customer. Reliability tests such as temperature cycling, vibration, humidity, burn-in, or load endurance become part of acceptance only when the drawing, validation plan, approved test specification, or customer requirement defines them.
Defect Acceptance and Corrective Action
A detected anomaly becomes a quality decision only after it is compared with the released drawing, applicable IPC criteria, test specification, product class, and measurable workmanship requirement. The result may be accept, controlled rework, reject, or an explicitly approved concession.
PCB and PCBA nonconformances fall into three useful groups: bare-board structural or conductor defects, assembly workmanship defects, and electrical or functional failures. The group points to the correct evidence, but it does not determine disposition by itself. Product class, affected structure, repairability, customer restrictions, and repeated verification still control the decision.
| Defect Mode | Detection Evidence | Acceptance Basis | Disposition Rule | Post-Disposition Verification |
|---|---|---|---|---|
| Open or short circuit | Electrical test failure. | Netlist, drawing, test limit, and product criteria. | Investigate the failed result; repair and retest where permitted, reject, or process an explicitly approved concession. | Repeat the affected electrical test and retain failed-net and final-result evidence. |
| Insufficient hole plating | Microsection or copper-thickness failure. | Drawing, applicable IPC-6012 class, and specified copper basis. | Reject the affected lot unless an approved technical disposition establishes an acceptable condition. | Repeat structural measurement on the defined verification sample or lot. |
| Excessive bow or twist | Flatness measurement outside the released limit. | Drawing and applicable fabrication criterion. | Rework where a controlled method is permitted, otherwise reject or obtain an approved concession. | Repeat dimensional and flatness measurement after the action. |
| Solder-mask registration error | Visual or AOI indication. | Pad, hole, conductor-clearance, and drawing requirements. | Accept, rework where permitted, or reject according to the affected feature. | Reinspect the repaired or dispositioned area and confirm clearance. |
| Contamination or residue | Visual, ionic, or specified cleanliness failure. | Product cleanliness, coating, or process requirement. | Clean and reinspect where permitted, otherwise reject or investigate the material/process source. | Repeat the specified cleanliness test and affected coating inspection. |
| Solder bridge or short | AOI, visual, X-ray, or electrical indication. | IPC workmanship, package geometry, and circuit requirement. | Controlled rework and reinspection, or reject. | Repeat visual/AOI, X-ray when hidden structure is affected, and electrical test. |
| Cold, insufficient, or non-wetted joint | Visual, AOI, X-ray, electrical, or functional indication. | IPC workmanship requirement, land pattern, lead condition, and joint geometry. | Controlled rework where permitted, followed by full affected verification. | Repeat workmanship inspection plus electrical or functional tests affected by the repair. |
| Tombstone or shifted component | AOI or visual indication. | Placement, polarity, land pattern, and workmanship requirements. | Rework and reinspect, or reject if damage or repeatability prevents restoration. | Repeat AOI/visual inspection and relevant electrical check. |
| Missing or reversed component | AOI, first-article, electrical, or functional indication. | BOM, centroid data, drawing, and polarity requirement. | Correct the assembly, investigate the program or feeder cause, and repeat affected tests. | Repeat first-article/AOI plus electrical or functional verification. |
| BGA void, missing ball, bridge, or misalignment | X-ray indication. | Package geometry, workmanship criteria, drawing, and project-specific void or alignment limit. | Accept only when the defined criteria are met; otherwise controlled rework or reject. | Repeat X-ray and all electrical or functional tests affected by rework. |
Which Criteria Apply to Each Defect?
A microsection supports a hole-copper or internal-structure decision; it does not establish powered performance. AOI can support visible placement and solder-mask decisions, while an open or short requires electrical evidence. Hidden BGA conditions are judged from X-ray evidence against package geometry and the defined acceptance criteria.
The drawing may set dimensions, local workmanship limits, or product-specific requirements tighter than the baseline IPC class. The inspection record should identify which requirement governed the feature so that a general criterion is not used where the controlled drawing is stricter. Acceptance means that the measured condition meets the applicable requirement, not simply that no visible anomaly remains.
Rework, Reject, or Approved Concession
Rework is appropriate when an approved method can restore the required condition without unacceptable damage. The rework record should identify the original defect, approved repair instruction, operator action, board or serial identity, reinspection result, and any repeated electrical or functional test.
Reject is appropriate when the defect cannot be restored within the approved process or when the applicable class, drawing, or customer requirement prohibits repair. An approved concession is different from silent acceptance: it identifies the known nonconformance, affected quantity, technical basis, risk owner, and explicit approval. A failed requirement cannot be removed by changing the wording on an inspection report.
Root Cause and Effectiveness Verification
Contain the affected product first. Identify the work order, material or component lot, production program, equipment, process window, panel or board position, and shipment status, then isolate product that could share the same condition.
Confirm the acceptance basis before investigating cause. The drawing, IPC criterion, test specification, and product requirement define the actual failure mode. The investigation then compares material, process, equipment, program, tooling, and handling evidence against that failure instead of repairing only the visible symptom.
Corrective action targets the demonstrated cause and repeats every affected inspection or test. Effectiveness verification compares a defined later lot with the original failure mode, checks the same critical feature, and confirms that the corrected process remains stable. Closure requires evidence that later production remains controlled, not only that the original defective units were removed.
Acceptance Decision Examples
Bare-board plating example: a microsection shows a local hole-wall copper result below the released requirement. The lot is contained by panel and coupon identity; the drawing and applicable IPC class are confirmed; plating, desmear, aspect ratio, and coupon evidence are reviewed; and the affected lot is rejected or reprocessed only through an approved route. Release requires new structural evidence tied to the verification lot, not a rewritten inspection summary.
PCBA polarity example: AOI identifies a reversed diode after reflow. The board is contained with other units produced by the same feeder and program revision. The placement data, package marking, feeder setup, and first-article record are compared. After correction, the affected assemblies repeat AOI, electrical checks, and the relevant functional step because a visual correction alone does not prove that the reverse installation caused no electrical damage.
PCB Component Traceability and Quality Records
| Traceability Layer | Traceability Key | Decision | Containment Scope / Action | Required Record |
|---|---|---|---|---|
| Supplier and material | Manufacturer, part number, material grade, lot or date code, supplier, and declaration identity. | Confirm material identity and approved source. | Isolate the manufacturer lot, date code, finish, laminate, or material batch. | Supplier declaration, material certificate, approved-source record, or incoming data. |
| Incoming quality control | Incoming lot, quantity, condition, packaging, and specification result. | Accept, contain, or reject incoming material. | Stop the affected quantity before production and identify any already-issued material. | Incoming inspection result and material status. |
| Production | Work order, board revision, process stage, equipment, tooling, recipe, or program identity. | Continue, stop, or correct the active lot. | Identify boards by work order, program, equipment, process window, panel, or time range. | MES history, traveler, profile, and first-piece result. |
| Inspection | PCB or PCBA lot, inspected feature, sample, panel, board, or package position. | Accept, rework, reject, or expand inspection. | Isolate the lot, position, defect class, or inspection range. | AOI, X-ray, dimensional, microsection, cleanliness, or workmanship result. |
| Electrical or functional test | Net, assembly serial, lot, test program, firmware/configuration, and measured result. | Confirm circuit integrity or intended operation. | Identify affected serial numbers, nets, circuits, fixture channels, or program revisions. | Electrical, ICT, boundary-scan, MDA, functional, or interface result. |
| Compliance | Material, construction, market, customer, or restricted-substance requirement. | Confirm the stated compliance condition. | Isolate the material, finish, component, construction, or destination market. | Material declaration, test evidence, certificate, or certificate of compliance. |
| Shipment | Order, board revision, lot, serial range, inspection date, quantity, and report IDs. | Confirm the identity of shipped product and evidence. | Link a field issue to the affected revision, lot, serial range, or shipment. | Linked shipment quality record and supplied report set. |
Supplier and Incoming Lot Records
The incoming lot connects a supplier document with the material actually received. A certificate that cannot be tied to a manufacturer, part number, laminate grade, finish, component lot, date code, and received quantity cannot isolate risk. The accepted lot record connects the declared identity to the quantity and condition inspected at receiving.
If one date code, laminate batch, surface-finish record, or component source becomes suspect, the quality team can locate linked production lots instead of assuming that every order is affected.
How Are Process and Test Results Traced?
The containment range depends on the shared condition. A placement-program error may affect one work order; a material issue may cross several work orders; a fixture-channel problem may affect only specific test positions; and a single failed board may remain isolated when surrounding evidence shows no common cause.
A practical chain may read: order 42817 -> board revision C -> laminate lot L2407 -> panel 12 -> AOI report A-103 -> X-ray report X-061 -> functional-test program FCT-4.2 -> shipment lot S-42817-02. The identifiers will differ by project, but the relationship must remain reconstructable.
A PCB certificate of compliance confirms only the condition stated by that certificate. Dimensional, electrical, structural, workmanship, cleanliness, and functional results remain separate when each forms part of the acceptance basis.
PCB Compliance and Quality Standards
Management-system certificates describe how the factory controls work. IPC documents address materials, fabrication, soldering, workmanship, classes, and repair. RoHS and REACH address restricted substances and supply-chain communication. UL 796 and UL 796F address recognized printed-wiring-board constructions. Product acceptance still depends on the released drawing, applicable class, inspection results, test evidence, and lot identity.
| Standard / Requirement | Control Scope | SUGA Evidence |
|---|---|---|
| ISO 9001:2015/Amd 1:2024 | Quality-management system, defined responsibility, internal audit, corrective action, and continual improvement. | SUGA ISO 9001 certificate and controlled quality procedures; product acceptance still requires lot-specific evidence. |
| ISO 14001 environmental management system | Environmental responsibilities, operational controls, objectives, monitoring, and improvement. ISO 14001:2026 is the current published edition. | SUGA currently lists an ISO 14001:2015 certificate; certificate transition status should be confirmed from the current document. |
| IATF 16949:2016 | Automotive quality-management system, supplier quality, change control, defect prevention, and continual improvement. | SUGA IATF 16949 certificate and automotive project records within the certificate and order coverage. |
| ISO 13485:2016 | Medical-device quality-management system, controlled records, traceability, nonconformance, and change control. | SUGA ISO 13485 certificate and project-specific traceability and quality records; it is not medical-device approval. |
| IECQ QC 080000:2017 | Hazardous-substance process management and control of declared material information. | SUGA IECQ QC 080000 certificate plus supplier and project material records. |
| IPC-4101 | Laminate and prepreg material specification sheets and material selection. | Approved material specification, supplier certificate, lot identity, and incoming verification. |
| IPC-SM-840 | Permanent solder-mask material qualification and class. | Material qualification, process controls, cure evidence, and solder-mask inspection. |
| IPC-A-600M | Visual, dimensional, and structural acceptability of printed boards. | Bare-board inspection evidence linked to the specified class and drawing. |
| IPC-6012F | Qualification and performance requirements for rigid printed boards. | Material, process, coupon, inspection, and test evidence required by the order and class. |
| IPC-A-610J | Electronic assembly acceptability and workmanship by specified class. | AOI, visual, and workmanship results linked to the order class and drawing. |
| J-STD-001J | Soldering materials, methods, process control, and acceptance requirements. | Soldering-process records, workmanship evidence, and project-specific requirements. |
| IPC-7711/21D | Approved rework, modification, and repair methods for electronic assemblies. | Approved instruction, technician execution record, board identity, and post-rework verification. |
| IPC Class 2 / Class 3 | Product acceptance classes applied through the relevant fabrication or assembly standard; they are not separate standalone standards. | The order or drawing states the baseline class and any tighter local requirements. |
| RoHS Directive 2011/65/EU | Restricted-substance obligations for applicable electrical and electronic equipment and represented materials. | Supplier declarations, material data, finish information, test documentation, and project declarations as required. |
| REACH Candidate List obligations | SVHC communication and material information for applicable supplied articles and substances. | Supplier declarations, material records, and customer communication for the applicable candidate list date. |
| UL 796 / UL 796F | Recognized rigid and flexible printed-wiring-board constructions, materials, and production conditions. | UL recognition and construction information applicable to the actual board type and manufacturing route. |
System Records and Product Evidence
A management-system certificate controls how work is managed at the certified site and within its stated audit scope; it says nothing about the calendar gap between the certificate's issue date and the production date of a specific lot. Certification audits sample the system rather than reviewing every work order, so a valid certificate can coexist with a process condition the audit simply had not reached yet. Lot release therefore depends on the released engineering data and lot-specific inspection or test evidence, not on certificate validity by itself.
RoHS, REACH, and supplier material records address the represented material, finish, component, or construction at the level the declaration was written for. A component-level declaration does not automatically extend to a board that was reworked or repaired using a different solder, flux, or substitute part, since that intervention can change what is actually present without changing the paperwork. Each document should identify the item, revision, material or lot, applicable requirement, and date closely enough to confirm it still matches the configuration actually shipped.
Quality Controls by Application
Automotive Electronics
Automotive PCBAs carry vibration, thermal cycling, high-current paths, and multi-year service expectations. The pitfall that catches buyers is a component or process substitution that slips through unnoticed: AOI, X-ray, electrical test, and FCT confirm the board as built, but a swapped connector, alternate solder alloy, or relocated production line can still pass every functional check while quietly shifting thermal mass or reflow behavior under vibration, because unit-level testing was never designed to detect a configuration change, only a functional failure. PPAP-related evidence should tie the approved board revision to its actual component sources, process flow, control plan, and any authorized change, since a passing result on a changed configuration does not extend the original approval to that change.
Medical Devices
Medical electronics place the emphasis on cleanliness, traceability, repeatable assembly, and record retention across long life cycles. The pitfall is less about achieving a clean or functional result once than about proving that result still holds after any change: a firmware revision, alternative PCB material, or test-program update can pass its own verification while leaving the original device-level validation unconfirmed, because a component-level pass does not automatically demonstrate equivalence to the validated configuration. The acceptance plan should define the cleanliness method and limit, whether verification is sample-based or lot-based, and how reworked boards are reverified. ISO 13485 supports the manufacturing quality system and supplier audit, but the certificate itself is not evidence that a specific changed configuration was revalidated.
Aerospace and Avionics
Avionics assemblies combine multilayer or rigid-flex structures, fine-pitch packages, vibration, temperature cycling, and long record-retention periods. A common gap is coupon placement: microsection and hole-copper evidence represent only the sampled location, so a coupon taken from an open panel area can pass while a hole near a connector mounting pattern or a densely populated region, where mechanical stress actually concentrates, goes unverified. Hidden-joint inspection and electrical verification cover the assembly, but neither substitutes for defining, at the drawing stage, which structural areas the sampling plan is meant to represent. The order must define any aerospace, space, military, customer, serial-level traceability, repair, FOD, or retention requirements. SUGA holds AS9100D certification; its applicability to the required manufacturing site, scope, and project must be confirmed before the project is accepted.
Telecom and IoT Gateways
Gateway boards combine HDI routing, BGA or QFN packages, RF and high-speed paths, connectors, power sections, and provisioned identities such as serial numbers or MAC addresses. The gap that catches buyers is treating a high boundary-scan or ICT pass rate as full-board coverage: boundary scan only exercises compatible digital interconnects, so an RF matching network, analog sensor path, or connector-loading issue can sit entirely outside its reach while the digital pass rate looks clean. SPI and AOI control paste and visible placement, X-ray addresses hidden joints, and defined impedance or signal checks address selected high-speed paths, but each covers a different physical domain. The final record should identify firmware, test-program revision, interface limits, and provisioned identity, and the acceptance plan should state explicitly which RF, analog, or connector checks sit outside the digital test coverage.
Industrial Controls and Outdoor Equipment
Industrial and outdoor electronics face contamination, humidity, condensation, temperature change, connector wear, and conformal-coating failures over long unattended service periods. The pitfall is sequencing: coating inspection runs last, so it gets treated as proof the board underneath is clean, but a coated board can still fail in the field when ionic residue was trapped underneath before the coating was ever applied, and coating coverage cannot detect a contamination problem it was applied on top of. Coating inspection must define material, masking boundaries, thickness or coverage criterion, cure condition, and excluded test points, while pre-coating cleanliness verification remains a separate, earlier verification step that the coating step cannot retroactively satisfy. Environmental stress, power/load testing, and connector cycling are added only when the product specification defines the condition, duration, and acceptance limit.
Inverters and Battery Management Systems
Power electronics place unusual emphasis on finished copper definition, high-current joints, solder fill, thermal concentration, and protection thresholds. The pitfall is testing at the wrong current: a joint with marginal copper thickness or solder fill can look identical to a sound one under continuity or an unloaded FCT, because temperature rise scales with the square of current, so a test run at reduced load simply never generates enough heat to expose the weakness — the same joint can still overheat once the unit reaches its full rated current in the field. The released test plan should define load, voltage, current, temperature, insulation resistance or dielectric test where applicable, shunt accuracy, thermal measurement points, and required protection response, with the load level stated explicitly rather than left to whatever the fixture happens to apply.
Our PCBA Production Lines
PCB Quality & Compliance FAQs
Shipment evidence can include dimensional inspection, bare-board electrical test, microsection, impedance, material, cleanliness, workmanship, X-ray, functional-test, final inspection, and certificate-of-compliance records. The exact set must be agreed before production because some reports are standard lot records while others require project-specific coupons, retained images, serial-level results, expanded sampling, or customer formats. Each supplied record should link to the order, board revision, lot or serial range, inspection date, and report identity.
No. AOI checks visible placement and solder-workmanship conditions such as missing, reversed, shifted, tombstoned, or visibly bridged parts. Electrical testing checks continuity, isolation, component values, and specified circuit relationships. A visually acceptable assembly can still contain an open circuit, wrong value, damaged component, or test-program problem.
X-ray is used when the critical solder or internal structure cannot be viewed directly. Typical triggers include BGA, QFN, LGA, bottom-terminated devices, hidden joints, press-fit or through-hole fill, and internal structural questions. The project should define whether inspection is first-article, sampled, or 100%, which locations are covered, and what void, alignment, bridge, fill, or missing-ball criteria apply. X-ray does not prove circuit function or firmware behavior.
The order should state one baseline class through the applicable fabrication and assembly requirements. The controlled drawing may apply tighter local requirements to identified holes, conductors, solder joints, or other features when the location, criterion, inspection method, and acceptance evidence are explicit. This preserves one consistent baseline while preventing a general Class 2 requirement from overriding a documented high-reliability feature.
No. RoHS, REACH, supplier declarations, and material certificates address restricted substances, material identity, finish, or chemical communication duties for the represented item. Inspection and test reports record dimensions, plated structures, electrical connectivity, cleanliness, workmanship, hidden joints, or powered function for the manufactured lot. Both may be required, but they answer different acceptance questions.
Confirm the released fabrication and assembly data, BOM, centroid data, drawings, baseline IPC class, critical features, controlled impedance, component substitutions, sample plan, test limits, firmware or configuration, required reports, market or material obligations, record-retention period, and concession authority. These inputs tell production what to control, inspection what to measure, test engineering what to verify, and final quality which evidence is required before shipment.
RoHS compliance means that the represented PCB materials, finishes, and components meet the applicable restricted-substance requirements for the intended product and market based on the supplied declarations, material data, or test evidence. It does not establish board dimensions, plated-hole integrity, netlist conformance, solder workmanship, cleanliness, or functional performance for a production lot.