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4 Layer PCB Manufacturer
4-Layer PCB Fabrication for Controlled-Impedance and Dense-Routing Designs
SUGA manufactures rigid FR-4 four-layer printed circuit boards (PCBs) that provide designers with continuous reference planes, controlled impedance, or greater routing capabilities than two-layer printed circuit boards. Capabilities include 3/3 mil line/space on compatible constructions, controlled-impedance tolerance of ±10% as standard or ±5% for approved tighter stackups, and TDR verification when specified. IPC-6012F Class 2 or Class 3 requirements apply if identified within the procurement documents.
The four-layer construction is useful to customers because the two internal copper layers address routing, reference-plane, power-distribution, or signal-integrity constraints. Tight limit specifications vary by construction and cannot be combined automatically on a single board.
4-LAYER PCB SPECIFICATIONS
4Copper layers
3/3 milMin trace / space Compatible constructions
1.6 mmCommon finished thickness
0.5-3 ozCopper options 3 oz where geometry allows
±10% / ±5%Controlled impedance Standard / approved tighter stackups
Class 2 / 3IPC-6012F When specified
* Tight limit specifications require construction-level review of the stackup, copper, thickness, hole geometry, and acceptance requirements.
2-layer vs 4-layer PCB vs 6-layer PCB: Why Move to a 4-Layer PCB
When deciding whether to use a two-layer, four-layer, or six-layer printed circuit board, the lowest layer count that meets all of the routing, return-path, impedance, power-distribution, and mechanical requirements should be chosen.
DESIGN GUIDE
4-Layer PCB Guide
Layer structure, stackup, routing, thickness, impedance, and design trade-offs.
Read guide →| Attribute | 2-layer PCB | 4-layer PCB | 6-layer PCB |
|---|---|---|---|
| Copper layers | 2 | 4 | 6 |
| Internal reference planes | 0 | 1-2 | 2-3 |
| Routing density | Low | Medium-high | High |
| Controlled impedance | Possible; less flexible | Well suited | Well suited |
| Power / ground allocation | Shared outer copper | Internal plane options | More plane options |
| Manufacturing complexity | Low | Medium | Higher |
| Best fit | Simple / low-density | High-speed / mixed-signal / dense | Dense high-speed / more references |
A 2-layer PCB remains appropriate when routing fits cleanly and the required return paths can remain intact. Four layers become useful when internal copper solves reference-plane, routing-density, controlled-impedance, or power-distribution constraints. Move beyond four layers only when additional routing channels or reference planes solve a defined design problem; a higher layer count is not automatically a better design.
For an engineering review, the layer-count decision should be tied to actual routing pressure rather than a generic performance ranking. For example, if a 2-layer PCB layout can only be accomplished by cutting the ground return at multiple places, expanding the PCB width, or using unusual geometries to achieve controlled impedance, moving to a four-layer PCB design would generally reduce these design compromises. On the other hand, if a 4-layer PCB has fully utilized both of its outer layers and cannot adequately provide a reference plane or power distribution for its interface requirements using the internal layers, then it would be more efficient to design a six-layer PCB rather than continuing to find ways to work around the routing limitations of the 4-layer PCB.
Example 4 Layer PCB Stackup
The following example illustrates a four-layer PCB stackup. This illustration is only an example; it does not represent all PCB stackup configurations and is not a fixed impedance geometry.
| Layer | Function | Material | Example thickness |
|---|---|---|---|
| L1 | Signal / components | Copper | 35 um |
| Dielectric | – | Prepreg | 300 um |
| L2 | Ground / reference | Copper | 35 um |
| Core | – | FR-4 | 710 um |
| L3 | Power / routing | Copper | 35 um |
| Dielectric | – | Prepreg | 300 um |
| L4 | Signal | Copper | 35 um |
Final dielectric separation, copper, material grade, and pressed thickness are defined in the approved construction documents or any applicable controlled-impedance specifications. The nominal values above total about 1.45 mm, so they are illustrative rather than a complete 1.6 mm finished construction.
In terms of overall thickness (nominally) versus the distance between each of the critical signal layers and their respective copper planes, the more critical relationship is the distance. An alteration in the prepreg or core material can require a different trace width to achieve the same targeted impedance. As a result, it is important to have an approved fabrication stackup prior to finalizing controlled-impedance geometry for production.
How to Choose a 4 Layer PCB Stackup
In order to select the appropriate stackup on a four-layer PCB, you must take into account both the reference relationships required for your critical signals as well as the amount of routing and power distribution space your design necessitates.
| Stackup | Best for | Trade-off |
|---|---|---|
| SIG / GND / PWR / SIG | General mixed-signal | Bottom signals need care around split power |
| SIG / GND / GND / SIG | High-speed on both outer layers | Power uses outer traces / pours |
| SIG / GND / SIG / GND | More internal routing | More complex reference transitions |
A number of supply rail voltages will not necessarily need a power plane that completely covers the PCB. By using traces and localized pours in their construction, the signal reference structure required by critical signals can be efficiently maintained during layout. These stackups should be considered starting points rather than hard-and-fast rules. If you use the same functional layer names as another designer, you can get different electrical performance based on the dielectric thickness, the thickness of the copper, the split design of the planes, and via transition characteristics. Therefore, you would want to create a stackup where critical signals have a consistent reference nearby, but power distribution and connector escape areas remain practical.
How to route a 4 layer PCB?
The process of laying out the physical four-layer stack and placing functional blocks on the stack should be such that the critical signal paths remain as close to continuous references as possible. Critical signal paths must be routed with their respective return paths, and both the signal trace and the copper reference directly beneath it must be inspected. The designer should identify reference changes whenever a critical signal transitions to another layer and should arrange the power distribution and decoupling based on these reference requirements. The selected geometry, impedance rules, and manufacturing rules should then be applied before final connectivity, plane-continuity, and fabrication-file checks.
SUGA 4 Layer PCB Manufacturing Capabilities
SUGA manufacturing capabilities are construction-dependent, so not every limit can be combined in one board. Fine geometry, copper weight, impedance, thickness, hole structure, material, and acceptance requirements are all evaluated together as one construction.
3/3 milFine geometry Compatible constructions
0.5-3 ozCopper options 3 oz where geometry allows
HASL / ENIG / OSPSurface finishes Lead-free HASL also available
AOIInner-layer inspection Before lamination
E-TestBare-board verification Open / short detection
MicrosectionStructural verification When required
Project-dependent. Tighter combinations require stackup, copper thickness, hole geometry, material, and acceptance review before production.
A construction review confirms whether the requested limits are compatible.
How 4 Layer PCB Parameters Work Together
The critical four-layer PCB parameters are coupled together. The quickest way to design a stackup that is either difficult or impossible to manufacture or verify against the requested specifications is to treat these parameters independently. A useful design for manufacturability (DFM) review asks which parameter will affect another manufacturing limit, rather than examining the parameters separately in each drawing note.
Copper weight x line/space: Heavier copper weight requires additional etch allowance and may reduce the capability to create fine geometry. A fine line/space limit should not be mixed with heavier copper weight without conducting a construction review.
Dielectric spacing x impedance: Changing the distance of the signal from the reference plane will change the geometry needed to reach the same impedance target. The overall thickness of the board cannot alone establish this relationship.
Board thickness x drilled hole: Increased thickness of the board increases the aspect ratio for a drilled hole with the same diameter; therefore, hole size, plating, and finished thickness should be reviewed together.
Via structure x process route: Blind, buried, and microvias may introduce drilling, plating, filling, inspection, and lamination steps that are structure specific. The via strategy can therefore impact both the manufacturability and cost of the design.
There are two additional relationships that should remain visible during review, even if they are not primary specifications. Copper distribution and dielectric balance will affect bow and twist; surface finish will affect pad planarity, solderability, storage, and contact properties. These relationships will typically be secondary to routing, impedance, copper, and via geometry, but in the case of mechanically constrained or fine-pitch assemblies, they can become critical before production.
Controlled Impedance and Verification
Controlled impedance is defined by the electrical target and manufacturing tolerance. The electrical target is calculated against the approved pressed stackup, where trace width, copper thickness, reference-plane distance, dielectric properties, copper profile, and differential-pair spacing all contribute to achieving the desired results. For example, a 50 ohm target does not mean a universal trace width across all four-layer constructions.
For controlled-impedance work, the approved stackup and geometry are used to manufacture the coupon structure with the board. TDR can then measure the finished coupon against the specified target and tolerance. Standard control is ±10%; tighter control (±5%) requires approved stackups with narrower material and process variation. Bare-board E-Test verifies opens and shorts but does not replace TDR; TDR does not replace connectivity testing.
±10%Standard toleranceControlled-impedance production
±5%Tighter controlApproved stackups
TDRCoupon verificationMeasured against specified target / tolerance
The acceptance standards in manufacturing are strongest when all elements of the manufacturing process (drawings, stackups, coupons, and reports) use the same target and tolerance. Interface targets (i.e. 50 ohm single-ended or differential values) identify electrical requirements, while fabrication tolerance indicates the acceptable production band. Keeping interface targets and fabrication tolerances separate prevents a common sourcing problem where the interface specification can be confused with the PCB manufacturing acceptance tolerance.
4 Layer PCB DFM Checks
Key design for manufacturability checks focus on combinations that could fail late in fabrication, inspection, or assembly as opposed to generic warnings that are produced from the CAD program. These checks are most beneficial when performed prior to tooling, as this is when the stackup, hole structure, and routing rules can be modified without generating scrap or delaying the build.
01 – Reference continuity
High-speed trace signals should not cross unintended splits or voids within their reference copper. Check signal routing and reference copper below the signal, including layer transitions.
02 – Impedance definition
In order to ensure a controlled structure, it is necessary to define target impedance, tolerance, line type, layer, and the approved stackup. If any of these items are missing from the fabrication data, then the fabricator may not have a measurable acceptance condition.
03 – Drill vs finished hole
Mechanical drill diameter and finished plated-hole diameter are not the same dimension. Plating reduces the opening, so the fabrication data must identify which dimension controls fit and annular-ring requirements.
04 – Copper vs fine geometry
Heavy copper and tight line/space are competing design requirements since thicker copper requires more etching allowance than a thinner layer of copper. As such, when checking local geometry and copper weight, both should be checked as a single construction and not as independent maxima.
05 – Via structure and stack balance
Blind, buried, or microvia requirements must be established prior to process planning. Copper and dielectric material should also be reasonably balanced to control bow and twist through thermal processing.
How a 4 Layer PCB Is Manufactured
Conventional rigid 4-layer printed circuit board manufacturing employs a compact multilayer manufacturing method. However, each stage of the manufacturing process will have a separate control point. The following steps outline a standard manufacturing process; variations to this process can result from using heavy copper, blind or buried vias, microvias, specific materials, or tighter acceptance criteria.
STEP 01Inner-Layer Imaging & Etching
Copper-clad core L2/L3 circuit patterns are constructed using the approved inner-layer data.
STEP 02Inner-Layer AOI & Bonding Prep
Inspection of the internal circuits occurs while they are still accessible. Bond preparation for lamination is performed to ensure reliable bonding.
STEP 03Layup & Lamination
The core, prepreg, and outer copper foils are aligned and pressed under the approved lamination cycle.
STEP 04Drilling & Hole Preparation
Through-holes and vias are drilled, then the hole walls are prepared for metallization and plating.
STEP 05Hole Metallization & Plating
Copper is established through each of the drilled holes to create the required interlayer connections.
STEP 06Outer-Layer Circuit Formation
L1/L4 trace patterns, pads, and copper features are constructed using the approved fabrication data.
STEP 07Solder Mask, Legend & Finish
Mask and markings are applied, followed by the specified exposed-copper finish such as HASL, ENIG, or OSP.
STEP 08Profiling & Final Verification
Once the PCBs have been profiled, they are electrically tested, and TDR coupon measurements are completed when controlled impedance is specified.
A standard PTH board is therefore different from projects that add heavy copper, blind or buried vias, microvias, or special laminate materials. Those features should be treated as manufacturing conditions that can affect manufacturing complexity, required inspections, cost, and lead time.
Quality Testing and Inspection
Each inspection method verifies a different element of the specified requirement. Quality verification should confirm the stated manufacturing capabilities rather than rely on a single general statement.
AOIInner-layer inspectionPattern verification before lamination
RegistrationAlignment checksLayer-to-hole relationship
MicrosectionStructural verificationHole copper / selected internal features
E-TestBare-board electrical testOpen / short verification
TDRImpedance verificationCoupon measured to specified requirement
DimensionalMechanical inspectionThickness / outline / controlled features
Electrical testing of bare circuit boards and impedance coupons does not confirm that a populated circuit board will perform as it is designed under power. PCBA functional testing is a separate requirement when specified.
The inspection plan should follow the risk being controlled. Automated Optical Inspection (AOI) is valuable before a PCB is laminated because buried inner-layer defects cannot be inspected visually after lamination. Microsectioning or copper measurement can assess selected structural requirements that electrical testing cannot confirm. No single test replaces the rest of the verification chain.
4 Layer PCB Applications
The application name alone does not justify four layers. The useful question is whether the added internal copper solves a routing, reference-plane, power-distribution, or signal-integrity constraint. Some products in this category may require two, four, or even more than four layers of copper to meet component density and interface speed requirements as well as the required power architecture, physical dimensions, and electromagnetic compatibility (EMC) requirements.
RF / IoT
The continuous reference plane keeps RF routing controlled throughout the PCB, while the remaining layers separate power and digital routing. The major risk here is that an RF reference will be broken or that copper will encroach into antenna keepout areas.
USB / Ethernet
The routing of USB and Ethernet signals on a four-layer PCB enables the use of differential pairs with a nearby reference, while allowing for additional routing flexibility through connectors and in restricted areas. However, the geometry of the differential pairs and reference continuity must be maintained as these signals move from layer to layer and through various transitions.
Mixed-signal sensing
The additional routing resources provided by four layers will allow for low-level analog routing away from switching-current loops while still maintaining an organized ground reference. The ground plane should not automatically be split.
Industrial control
In addition to providing added routing resources, four layers give designers a greater degree of flexibility in placing control, sensing, communication, and power distribution circuits on compact boards. Designers must still separate switching-current paths and noisy power areas from low-level paths or communication areas.
Automotive sensor or body controller
Automotive sensors and body controllers can use four-layer PCBs for communication routing, power distribution, and dense connector-side escape. However, reference disruptions and noisy connector or power areas can couple noise into communication or sensing paths.
Portable medical or precision instrumentation
Portable medical or precision instruments can use four-layer circuit boards to maintain reference continuity for low-level acquisition alongside digital or wireless circuits. Shared return paths can introduce noise into low-level measurement signals.
4 Layer PCB Cost
There is no universal or reliable unit price for a custom 4-layer PCB without knowing the board dimensions, production quantity, construction details, verification requirements and delivery requirements. 4-layer PCB cost is best understood by linking each design choice to the manufacturing work it adds.
Board size and quantity
Panel utilization determines the amount of usable material from a production panel, while the initial setup and engineering costs are distributed across the accepted production quantity.
Controlled impedance
Stackup engineering, controlled geometry creation, coupon definitions and TDR testing require additional engineering and verification work.
Heavy copper
As copper weight increases, so does the demand for etching, plating, and spacing, along with increased demands on resin flow and thermal mass.
Blind / buried / microvia
The use of additional drilling, plating, filling, inspection, and potential lamination changes increases manufacturing complexity.
Special material or finish
Material costs and process conditions differ with laminate families, loss requirements, and finish selection.
Quick-turn requirements
When the schedule is compressed, there can be an expedite premium added to the cost even when the construction of the PCB does not change.
A meaningful supplier comparison should use the same basis for bare-board fabrication, setup or tooling, expedited production, shipping, tax, and any PCBA work, rather than comparing headline unit prices that include different services.
To optimize cost, the best approach is generally to use the least complicated construction that meets electrical and mechanical specifications. Reducing unnecessary via complexity, keeping materials and finishes within common process routes, avoiding incompatible maximum specifications, and allowing a normal production schedule can produce lower costs without sacrificing the intended function of the circuit.
Fabrication Files
For 4-layer PCBs, fabrication files include all four copper layers, solder mask, legend where used, the outline of the board, and drilling data. The construction requirements detail layer order, material specifications, final board thickness, and copper specifications, together with the intended hole types and dimensions.
For custom controlled-impedance requirements, you will need to identify the affected nets or structures, their target value and tolerance, and the stackup. Retain your quantity and delivery information, and include BOM and component-placement data if you are requesting assembly. Submit this information to the PCB supplier for engineering and DFM review prior to requesting a quote in order to resolve any construction conflicts before tooling.
Frequently Asked Questions
How thick is a standard 4 layer PCB?
The most common finished thickness for 4-layer boards is 1.6 mm. Other examples of standard thicknesses include 0.8, 1.0, 1.2, 2.0, and 2.4 mm. The finished thickness of a PCB is a mechanical dimension, while controlled impedance relies upon the dielectric separation between the reference plane and signal trace; therefore, multiple boards with the same finished thickness can have different trace geometries depending upon the dielectric spacing.
What materials are used in a 4 layer PCB?
FR-4 or high-Tg FR-4 are usually the materials used for rigid 4-layer PCBs. Low-loss laminates may be used when the end product requires lower signal loss or operates at high frequencies, while polyimide materials may be used in flexible, rigid-flex, and other high-temperature configurations. Therefore, selecting materials for your PCB should be based on thermal, electrical, mechanical, and manufacturing considerations and not just on layer count.
What copper weight is common for a 4 layer PCB?
The most common copper weights used on 4-layer PCBs are 0.5 oz, 1 oz, and 2 oz. Additionally, 4-layer fabrication can also produce boards with 3 oz finished copper if spacing and hole geometry permit. Using heavy copper on PCBs changes the requirements for etching and plating; therefore, it should never be assumed that heavy copper will automatically qualify for minimum line/space capability.
Can a 2-layer PCB have controlled impedance?
Controlled impedance may be achieved on a 2-layer PCB provided the dielectric construction and trace geometry support the target impedance. However, due to the signal-to-reference distance and limited area available for routing, the required trace geometry may often be more difficult to accommodate. Controlled geometry is generally more easily included in dense designs with 4-layer PCBs, as they provide internal reference-plane options.
Can a 4 layer PCB use blind or buried vias?
Yes, blind, buried, and microvias can be used when the routing or interconnection requirements warrant them. Conventional 4-layer PCBs primarily use plated through-holes, but blind, buried, or microvia designs can be used with increased routing density. Manufacturing these types of vias changes drilling, plating, filling, inspection, and possibly lamination operations; therefore, they should be defined prior to process planning.
Which surface finish is best for a 4 layer PCB?
The layer count does not dictate the finish type. Some finishes commonly used include HASL, lead-free HASL, ENIG, and OSP; which finish type you select will depend upon factors like pad planarity, solderability, how long you will store your board, contact requirements, the processes you use to assemble the board, and how the final assembly will be used. In projects requiring fine-pitch or planar pads, it is usually advantageous to use a flatter surface finish, while in other cases, cost or familiarity with a specific finish process is more important.
What is IPC Class 2 vs Class 3 for a 4 layer PCB?
IPC-6012F Class 2 and Class 3 identify different levels of acceptance for rigid printed circuit boards. Class 3 provides a higher reliability acceptance level for projects requiring it than Class 2; therefore, the class and any project-specific requirements should be included in the procurement documentation prior to PCB manufacture so that the inspections and documentation performed by the manufacturer will be based upon the specified requirement.
How much does a 4 layer PCB cost?
The price of a 4-layer PCB cannot be standardised, as it depends on quantity, board size, panel utilization, board material requirements, copper weight, hole structure, controlled impedance requirements, surface finish, inspection, and turn-around time. A standard FR-4 PTH construction will generally be less costly than boards manufactured using heavy copper, special materials, blind or buried vias, or tighter controlled-impedance requirements.