PCB Assembly Testing & Inspection Capabilities

From Solder Paste Inspection to Electrical and Functional Validation

SUGA provides coordinated testing and inspection services that connect physical assembly condition, electrical integrity, product configuration, and powered behavior from prototype through volume production.

Request a Quote

Upload BOM & Files

CAPABILITY

01005 Assembly · 0.2 mm Probe Access · 24–168 h Burn-In

QUALITY / TRACEABILITY

IPC Class 2/3 · J-STD-001J · FAI · Serial/Batch Traceability

How Do Inspection and Testing Differ?

PCB assembly inspection includes visual, measured, or imaged examination of the assembled PCB, while PCB assembly testing verifies electrical connectivity, selected component response, programmed configuration, powered behavior, and operating stability under voltage or current conditions, across a range of temperatures, or over time.

Verification Layer	Engineering Question	Output Evidence	What It Does Not Prove
Inspection	Is the assembly condition visible, measurable, or imageable?	• Measurements • images • defect classification • workmanship result	• Electrical continuity • firmware identity • powered behavior
Electrical Test	Are accessible nets and selected components electrically correct?	• Open/short result • measured values • isolation result • fault location • coverage data	• Every hidden-joint structure • firmware identity • untested powered states
Programming / Calibration	Is the correct firmware, identity, and parameter set loaded?	• Firmware revision • checksum • serial identity • calibration values • programming result	• Startup • interfaces • loads • timing • system behavior
Functional Test	Does the powered PCBA meet approved operating limits?	• Startup • rails • interfaces • load/output response • timing • pass/fail logs	• Every solder-joint structure • states omitted from the sequence • long-duration stability
Production Screening	Does the unit remain stable under the approved time or stress profile?	• Time-based operating data • monitored parameters • alarms • failure records	• Product qualification • lifetime validation • unmonitored stress behavior

An AOI can pass while there is an open circuit, an incorrect component value, an incorrect firmware version, or an interface failure. AOI evaluates only the optical attributes defined in the program. Conversely, a functional pass does not account for every under-package solder joint or any operating state that the test sequence did not exercise. Coverage must trace each failure mode to a first-line screen, confirming evidence, and the access or test-sequence conditions that could allow a failure to escape.

PCB Assembly Testing Methods

Choosing a testing technique relies on four parameters: whether net-level fault location is required, whether the product must be tested under load, whether firmware or calibration must be recorded, and whether intermittent failures require time-based screening.

Production volume is evaluated after the following criteria are established: test access, fault-diagnostic depth, testing-sequence length, and the availability of reusable test fixtures.

Test Method	Test Level	Interface / Stimulus	Best Production Use	Required Data	Measured Output	Primary Constraint
In-Circuit Testing	Component / net	Bed-of-nails probes at specified test points	Stable medium- or high-volume production	• Schematic • netlist • BOM • test-point map • limits • fixture correlation • revision	• Opens/shorts • selected R/C/L • circuit integrity • fault location	• Fixture NRE and node access • revisions may require fixture/program changes
Flying Probe Testing	Net / selected component	Movable probes on accessible pads, vias, or terminals	• Prototype • NPI • frequently revised low-volume production • selected medium volume	• CAD/netlist • accessible-node definition • limits • board support • pad geometry • mask clearance • side access	• Open/short result • selected measurements • fault location	• Longer cycle time than ICT • pitch alone does not define contactable pad or total coverage
Functional Testing	Powered board	• Power sequence • loads • signals • commands • operating sequence	Products with explicit startup, interface, load, timing, and pass/fail limits	• Firmware • commands • power/load conditions • interface definitions • golden unit/correlation basis • limits • report fields	• Startup • rails • I/O • CAN • I²C • SPI • USB • Ethernet • UART • output • timing • diagnostic logs	• Diagnosis depends on sequence and instrumentation • unexercised states remain outside coverage
Programming / Calibration	Device / parameter	• Firmware file • programming interface • calibration references • controlled procedure	Products requiring controlled firmware, serial identity, secure data, or calibration	• Controlled binary • checksum • version rule • serial rule • calibration procedure • reference values • result format	• Firmware confirmation • checksum • serial record • calibration value • result	Software and target values must match the correct hardware revision
Burn-In / Stress Screening	Assembly / finished product	Continuous or cycled time, power, load, temperature, or specified stress	• High-reliability • early-life-risk • application-stability programs	• Duration • operating state • stress profile • monitoring points • alarm limits • failure handling • data retention	• Operating stability • time trends • alarms • early-failure records	• Screening is not full qualification or lifetime validation • SUGA supports 24–168 hour programs

ICT vs. Flying Probe Fault Isolation

Fast fault location allows ICT to be effective for products that have a stable design and regular manufacturing demand. The test fixture must maintain contact quality because worn probes, PCB assembly flex, solder-mask intrusion, tall components, fixture-correlation problems, or a mismatched PCB revision can create systematic false failures or attach the result to the wrong hardware.

Flying probe is suitable for prototypes, NPIs, and frequently modified low-volume products because movable probes can access test points without a dedicated test fixture. Programs can change quickly and retain net-level diagnostics, but target contactability also depends on probe approach, probe pitch, pad geometry, mask clearance, and planarity.

An access pitch of 0.2 mm does not mean that every 0.2 mm pad can be contacted. Accessibility also depends on pad size, exposed metal, probe diameter and angle, local height, and the number of required contacts. The more contacts and the greater the measurement depth, the longer the cycle time.

Functional Testing and Configuration Control

ICT provides stronger diagnostic information at the component and net levels, while FCT provides stronger evidence of powered product behavior. A stable production sequence may run ICT before FCT so that assembly errors are isolated before the assembly enters a longer powered sequence. FCT must evaluate startup, power rails, interfaces, loads, timing, recovery, and fault conditions. A sequence that reaches a clean boot does not guarantee that the USB interface enumerates or that the CAN bus remains stable under load.

Programming verifies the correct file, checksum, target device, and write result. Calibration verifies reference voltage and current values, target limits, the procedure, and the recorded result. A golden unit may support fixture correlation; however, it cannot define the fixture limits because cable drop, fixture resistance, instrument accuracy, hardware revision, firmware revision, and load conditions can alter the measured result.

Burn-In for Early-Life Screening

Burn-in is performed to address early-life, thermal, voltage-related, load-related, communication, or operating-stability risks. SUGA runs monitored programs for 24 to 168 hours, depending on the product risk and screening requirements.

Duration, unit or sample coverage, rack loading, airflow distribution, power distribution, stress profiles, monitored points, alarm limits, failure isolation, and data retention affect total cycle time and cost. Timestamped resets, bus lockups, current drift, temperature excursions, and recovery behavior provide better evidence of performance than a final pass/fail result alone.

PCB Assembly Inspection Methods

Incoming Component Inspection

Incoming inspection verifies that part numbers, manufacturer details, packaging, markings, lot codes, date codes, physical condition, moisture controls, and traceability documents for incoming components match the approved BOM and purchasing information. Incoming inspection can prevent wrong, damaged, poorly controlled, or suspicious components from being included in the assembly before use.

Appearance alone is not sufficient to prove authenticity. A questionable finding may require dimensional or electrical verification, decapsulation, X-Ray, or laboratory analysis, with the material disposition recorded for the affected lot.

Manual Visual Inspection

Visual inspection of PCB assemblies is performed by an operator who uses their experience and judgment to verify component placement, orientation, polarity, markings, contamination, damage, accessible solder joints, connector seating, mechanical hardware, and cable routing.

Manual inspection is generally performed during first article, THT, mechanical assembly, rework, and final handling. An operator can interpret assembly details that are not always captured by an AOI program.

Operator observations alone are not sufficient to determine the electrical performance of a PCB assembly or confirm component authenticity.

What Does 3D Solder Paste Inspection Measure?

The key outputs of SPI—paste volume, area, height, and offset—provide the earliest indications that a print condition may create open, bridge, or tombstone risk after reflow. Printer drift, stencil or support problems, and cleaning gaps can be identified before the deposits are sealed into solder joints. Tombstoning occurs after reflow and is confirmed by visual inspection or AOI.

What PCB Assembly Defects Can AOI Detect?

AOI does not read component value or authenticity. It uses programmed references to evaluate joint geometry, orientation, and placement. On 01005 and other fine-pitch work, the same camera view that identifies a shifted part can still miss a joint that the lighting angle cannot reach.

Three-dimensional measurement adds height, coplanarity, and shape data to placement and joint-geometry analysis where component-package geometry permits. The effectiveness of AOI for PCB assembly inspection depends on lighting, surface contrast, approved references, defect libraries, and false-call control. Under-package solder joints remain outside a purely optical view.

What PCB Assembly Defects Can AOI Detect

When Does X-Ray Inspection Add Required Evidence?

In an inspection plan, X-Ray inspection provides direct structural evidence for solder joints located beneath components such as BGA, QFN, bottom-terminated components, flip-chip, and PoP, where the joints are obscured from visual inspection. For example, a component body may prevent a technician from seeing a corner void that can fail under thermal cycling, while viewing the solder joint from multiple angles allows the void to be located and evaluated more accurately.

Top-view 2D imaging provides rapid board screening. When solder joints are obscured by stacked or overlapping structures, 3D or CT imaging can separate them and provide depth information for more accurate failure isolation. Factors affecting X-Ray image quality include board thickness, copper mass, shielding, viewing angle, board support, and acceptance criteria.

Although X-Ray inspection provides information about the physical structure of solder joints, it does not confirm their electrical or functional condition. Electrical or functional testing may still be required to determine whether the solder joints are connected and operating as intended.

Where Each Inspection and Test Enters Production

Within SUGA's manufacturing capabilities, the inspection and test plan starts with incoming-material control and continues through printing, placement, reflow, electrical verification, configuration, powered testing, and production screening. Risks associated with PCB assembly defects should be detected at the earliest useful stage, before coating, shielding, or enclosure work removes access. Stage placement alone does not define complete coverage.

Failure Mode	First-Line Screen	Engineering Evidence	Confirmation	Coverage Dependency
Paste deposit: insufficient, excessive, offset, or imbalanced	SPI before placement	• Volume • area • height • offset • trend result	Post-reflow AOI or visual inspection of the resulting joint	• Pad criteria • program revision • stable support • drift response
Component: missing, wrong, shifted, rotated, or polarity reversed	Placement check or AOI	• Presence • position • orientation • marking • 3D height/shape where measured	• FAI comparison • electrical or functional test according to component role	• BOM identity • value • powered behavior where required
Visible solder: tombstone, bridge, lifted lead, insufficient solder	AOI or visual inspection after reflow	• Joint image/measurement • component position	Open/short test on affected accessible circuits	Covered or bottom-terminated joints use X-Ray when joint-level structural evidence is part of the acceptance plan
Under-package solder: BGA, QFN, PoP, flip-chip, or bottom termination	2D X-Ray after reflow when hidden-joint structural evidence is required	• Alignment • solder distribution • bridge • void pattern	• Oblique/3D X-Ray • electrical or functional test according to suspected failure	• Imaging mode • overlap • viewing angle • limits • correlation
Electrical: open, short, or incorrect selected value	ICT or flying probe	• Continuity • isolation • measured value • fault location	Functional test where operating behavior matters	• Tested nodes • accessible contacts • program limits • coverage report
Configuration: firmware, programming, serial, or calibration error	Programming verification	• Revision • checksum • serial identity • calibration value • result	Functional test with controlled configuration and limits	• Correct hardware/BOM revision • controlled file ownership
Powered behavior: startup, rail, communication, I/O, timing, or load failure	Functional test	• Interface response • output state • voltage/current behavior • timing • diagnostic log	• Oscilloscope • protocol analyzer • load instrument • engineering diagnosis	• Sequence • firmware • loads • commands • instruments • limits
Stability: intermittent thermal, voltage, communication, or operating failure	Burn-in or application simulation	• Time trend • alarms • reset/lockup • failure timestamp	Thermal, vibration, humidity, or product-specific screening/diagnosis	• Duration • sample/coverage plan • monitored parameters • alarm limits
Harness / electromechanical connection fault	• Continuity • isolation • manual inspection • powered assembly test	• Pin-to-pin result • insulation result • connector/retention finding • powered response	Functional test in assembled configuration	• IPC/WHMA-A-620F where in scope • mechanical/environmental tests separately defined
Post-change failure after repair, rework, fixture/program change, or process excursion	Repeat affected inspection/test	• Original failure • disposition • repeated result • final status	Regression or containment test where additional features are affected	Re-test extent follows the evidence invalidated by the change

Where Each Inspection and Test Enters Production

Standards and Traceability

A generic pass label does not document what the program covered, which revision was used, or what evidence was repeated following a failure. Records must support material disposition, product release, fault isolation, repair, retesting, and final acceptance.

Control Record	Required Fields	Capture Point
Pass/Fail Basis	• IPC-A-610J Class 2 or 3 • J-STD-001J • applicable IPC/WHMA-A-620F • customer drawings • product limits • approved deviations	Before production
Incoming Material Status	• Component identity • lot/date • condition • traceability documents • escalation result • disposition	Before placement
Inspection Result	• SPI/visual/AOI/X-Ray program revision • inspected feature • measurement/image • result • defect class	• Paste • placement • reflow • THT • first article
Electrical Test Result	• Tested nets/features • limits • status • fault location • coverage condition • fixture/program revision • disposition	When electrical access is available
Programming / Calibration Result	• Hardware revision • firmware revision • checksum • serial identity • calibration procedure • values • result	Configuration or powered test
Functional Test Result	• Sequence • firmware • power/load conditions • interfaces • instruments • limits • result • logs • diagnostic response	Powered verification
First-Article Approval	• Sample identity • BOM/drawing/program revisions • required inspection/test evidence • deviations • status • approval responsibility	After FAI and before continued production
Screening Result	• Duration • operating state • stress conditions • monitoring points • alarms • failure occurrence • final status	Burn-in or stress screening
Failure / Re-Test Result	• Failure class • affected unit/batch • repair/disposition • invalidated evidence • repeated test extent • final result	Failure or invalidated evidence
Traceability Link	• Board/BOM/material lot • unit or batch • program/fixture revisions • inspection • test • repair • re-test results	Throughout production

Which Standards Define Pass or Fail?

Acceptance criteria include the applicable IPC revision and class, customer drawings, product-specific limits, and approved deviations. SUGA supports Class 2 and Class 3 workmanship requirements per IPC-A-610J and soldering-process requirements per J-STD-001J. IPC/WHMA-A-620F applies when cable or wire-harness assemblies are included.

Records must indicate the applicable standards, revisions, classes, drawing requirements, product-specific limits, and associated deviations. The name of a standard does not define the product requirements.

Inspection and Test Records

An inspection and test record should answer four practical questions: what was inspected, against which limit, under which controlled hardware, firmware, fixture, and program revision, and what occurred following a failure. Images, measurements, defect classifications, dispositions, and unit or batch traceability can then support continued production, fault isolation, repair, or retesting.

What Does First-Article Inspection Cover?

An FAI confirms sample identity and conformity with the BOM, drawing, and program. It includes a review of component placement and polarity, workmanship, selected measurements, and the electrical, configuration, and functional results applicable to that assembly. It is a combined approval activity, not a single inspection method.

SUGA will issue an FAI report that details findings, deviations, result status, and approval responsibility before continued production. The order specifies the sample quantity and extent of evidence. There is no universal sample rule for every PCBA.

When Must Results Be Revalidated?

A substitution in the BOM could affect identity confirmation checks, AOI programming, electrical behavior, or functional performance. A revision to the PCB design may require changes to the optical program, probe access, netlist, fixtures, or FCT program. Firmware changes require repeating programming verification and any affected interface sequences. Fixture repair requires the related contact and correlation checks. Rework requires repetition of the affected visual, X-Ray, electrical, or functional evidence. Changes to coating, shielding, or enclosure use affect PCB access, cure or assembly, post-process functionality, and repair procedures.

Production Test Setup

Production Phase	Engineering Objective	Inspection Set	Electrical / Functional Set	Tooling and Control Decision
Prototype	Find design, assembly, access, and configuration faults quickly	• Direct visual • SPI/AOI where available • X-Ray for identified under-package risks	• Flying probe • bench measurements • programming • early functional checks	• Preserve debug access • avoid unnecessary dedicated tooling
NPI	Confirm repeatability and establish practical coverage	• SPI/AOI/X-Ray programs • FAI • recurring-defect analysis	• Flying probe or preliminary ICT/FCT • coverage and limit learning	Develop fixtures after access, sequence, and limits stabilize
Low-Volume Production	Balance coverage, cost, change flexibility, and result consistency	Established inspection programs and criteria	• Flying probe • FCT • limited dedicated fixtures according to repetition and diagnosis need	Add tooling where repeated use improves cycle time or consistency
Volume Production	Maintain repeatability and detect process/test drift	SPI/AOI/X-Ray with trend and escalation rules	Dedicated ICT and/or FCT where access, demand, cycle time, and diagnostic value justify them	Control fixture consistency, maintenance, correlation, spares, and revision

Test System Access and Control

Effective use of test fixtures and test instrumentation requires physical access, logical observability, stimulus, and measurement points to comply with the approved test plan. When dedicated ICT points are unavailable, SUGA evaluates accessible PCB pads, vias, terminals, connectors, flying-probe contact, boundary-scan resources, FCT observability, and design-revision options. Test-point presence does not guarantee stable contact. Mask clearance, probe approach, PCB support, warpage, fixture drop, and revision control can each affect the test results.

Test System	Access Requirement	Fixture / Process Control	SUGA Capability Window
SPI	Optical access to printed paste before placement	• Stable panel/board support • inspection program	Fine-pitch paste measurement for compatible pad geometry, support, surface, and program conditions
AOI	Clear view of components, leads, and visible joints	• Stable support • 2D/3D program • approved references • false-call control	01005 component assemblies and fine-pitch visible features under compatible optical access and support
X-Ray	X-Ray path through target joint or structure	• Board positioning • support • viewing-angle control • selected 2D/oblique/3D mode	• BGA • QFN • bottom-terminated • flip-chip • PoP • overlapping and other hidden structures
ICT	Specified test points or fixture contacts	• Bed-of-nails fixture • tester program • maintained probes • correlation • revision control	Stable repeat production where access, repetition, cycle time, and diagnostic value justify dedicated tooling
Flying Probe	Accessible pads, vias, terminals, or connector points	• Stable support • controlled probe approach • side access • no bed-of-nails	Access pitch down to 0.2 mm with compatible pad dimensions, mask clearance, planarity, height, and probe approach
Functional Test Bench	Power, ground, connectors, communication ports, loads, and measurement access	• Powered fixture • cables • loads • instruments • safety controls • software • maintained test package	• CAN • I²C • SPI • USB • Ethernet • UART • analog/digital I/O • loads • programming • calibration • product-defined functions
Programming / Calibration Station	Programming port, device interface, communication channel, or calibration point	• Adapter • controlled software • calibration references • version-controlled files	• Device programming • serial writing • controlled data loading • product-defined calibration
Burn-In / Screening Rack	• Stable power • thermal/airflow condition • load/interface access • monitoring points • safe multi-unit handling	• Rack • power distribution • loads • sensors • communication/logging • alarms • failure isolation	Monitored 24–168 hour programs and other specified screening conditions

The fallback sequence is ICT fixture contact, flying-probe contact, connector or harness access, boundary scan, FCT or indirect observation, and finally a design change. Variations in conformal coating, heavy copper, flexible PCBs, tall component heights, warpage, shielding, and enclosures may alter board support, contact, visibility, temperature, and the test sequence. These constraints must be addressed before tooling is released, not after production has begun and access has been lost.

Functional Test Files

Execution data may consist of Gerber or ODB++, IPC-2581 when supplied, the BOM, schematics, assembly drawings, centroid files, netlist and test-point data, firmware, protocols, power and load sequences, limits, and reporting fields. Quote accuracy improves when the combined execution data also identifies hardware and firmware revisions, available connectors, expected cycle time, unit or sample coverage, golden-unit status, reusable customer tooling, and required failure logs.

Applications

High-Density BGA Control Board

The assembly of a high-density rigid control board uses SPI, 2D/3D AOI, and X-Ray for hidden arrays; it also uses flying probe or ICT for accessible nets and FCT for startup, rails, memory, and interfaces on the control board. A void in one row of a staggered ball pattern can be hidden behind another row in a single top-down image; however, when the shield is installed over the control board, probe access usually disappears as well. The imaging angle, correlation criteria, pre-enclosure access, and re-test steps are fixed in the plan.

Automotive MCU Control Board

A control board for an MCU must be inspected for placement, polarity, connectors, THT, and visible solder before electrical and powered testing. The testing sequence begins with checking the power and ground of the control board, followed by selected-net testing, programming, startup, CAN, analog and digital I/O, sensor feedback, actuator commands, watchdog operation, and fault response. A control board can pass all static tests but still inadvertently latch into the wrong variant profile when it starts, meaning defective CAN timing or an actuator fault may only be identified when the MCU passes through real drive-state transitions. Records associated with firmware revisions, commands, currents, timing, and recovery can be used to differentiate configuration faults from assembly or interface faults.

LED Lighting Control Board

The LED control board is tested for paste, polarity, placement, bridges, connectors, opens, shorts, resistance, and current paths before electrical and powered testing. Powered checks on the control board indicate the illumination and dimming of the LED channels, each channel’s response to changes in brightness, current consistency, and temperature rise during continuous operation. Current signals are recorded for each channel during dimming and warming to show how the channels react to the thermal condition. Low-duty-cycle PWM, thermal current drift, LED channel imbalance, and intermittent opens in flex circuits can escape a single static check. The LED test program was verified using a 100 mA test current to determine point voltages. A 108-LED transparent flex assembly was tested for two days to provide a data log of test current, illumination, communication, temperature, alarms, and failure locations.

Medical Sensor Interface Board

The medical sensor interface board combines fine-pitch and contamination-sensitive inspection with power-integrity, analog-continuity, baseline-noise, excitation, gain, offset, calibration, alarm, communication, and firmware checks. A few microvolts of fixture noise or trace contamination during calibration could produce a result very similar to a gain or offset failure. A calibration file built for the wrong hardware revision can produce an incorrect result that still appears to pass. Records include calibration files for the correct hardware revisions, reference files for established baselines, gain and offset results, calibration ownership, firmware revision, and alarm response, thus maintaining the distinction between sensor front-end failures and configuration errors.

Safety Relay and PLC Module

AOI checks SMT placement and visible joints, while operators inspect THT insertion, polarity, lead form, connector seating, and solder fill. Electrical testing of safety relays and PLC modules includes continuity and isolation tests, selected values, relay-coil drive tests, contact switching, digital and analog inputs, output loads, communications, and repeated testing per channel. A single static test conducted on an energized relay may yield good results; however, the relay may demonstrate contact bouncing, welding, or contact drop after hundreds of cycles of switching a live load. Records include command-to-contact timing, loaded voltage drop, channel mapping, recovery, and any failure cycles of the relay.

High-Current Battery Management Board

A high-current battery management assembly considers current paths, shunts, power devices, connectors, thermal interfaces, temperature inputs, protection states, and communications. Inspection checks both high-current joints and component polarity. The electrical sequence of the high-current battery management assembly measures cell or bus-voltage channels, current sensing and balancing, pre-charge or contactor drive, CAN communications, thresholds, and fault recovery. A slight error in a cell simulator can make working balancing logic appear defective. Connector voltage drop during the application of real current can hide a shunt error that was undetectable in an idle state. The fixture records each channel value, protection threshold, current reading, temperature status, communication status, and recovery state at a defined load point.

Motor-Control Board

The motor-control board adds gate-driver supply, phase-current feedback, dead time, PWM response, power-stage protection, temperature sensing, communications, and restart-state testing to the high-current test plan. A motor-control board can pass logic-level FCT while a gate channel, current-sensing path, or protection response fails under load. The fixture applies controlled stimulus to the board while simulating a motor load and records the command, gate output, phase or bus current, timing, fault trips, temperature rise, and recovery.

Conformal-Coated Outdoor IoT Gateway

The functional testing and verification of the IoT gateway follows coating keepout control, masking, and appropriate curing controls. The coating process can introduce coated contacts, incomplete keepouts, cure-related leakage, trapped contamination, or bus lockups; therefore, testing verifies boot, Ethernet, USB, UART logs, peripheral buses, wireless-module control, power cycling, communication stability, and long-run operation. Pre-coating and post-coating results link coating leakage, restart behavior, communication failures, and long-run logs to process changes.

Camera Module Assembly

Camera-module inspection assesses sensor condition, connector condition, solder condition, and how the enclosure is attached to the camera module. We also run power-up tests that include startup and image checks, communication with the camera, power-supply current, temperature rise during operation, restart, and errors. Other faults may exist, such as contamination, frame loss, thermal drift, intermittent connector failure, and failure to restart, but could go undetected during a single image test.

The camera run-in verification program requires that the camera or cameras placed in boxes run for 1 week while supply current (A), average sensor operating temperature over time, the number of frames produced, failed communication events, restart events, reset count, lockups, and the associated hardware and firmware revision are recorded.

Wire-Harness and Backplane Interconnect Assembly

For a backplane or off-board wire-harness assembly, we perform wire-to-board inspection before applying power and connecting the wire harness to the board. A connector may appear to be seated but still contain a marginal crimp or a reversed pin. We perform physical inspection of the wire harness for proper strain relief and routing. For any wire-harness assembly within scope, we perform pin-to-pin continuity and insulation-resistance testing under IPC/WHMA-A-620F, which specifies requirements for cable and wire-harness assemblies. A pin that shows continuity at rest may become intermittent during vibration or thermal cycling.

Pin-to-pin results, insulation-test results, inspector-identified connector or retention problems, and the response of the wire harness after power is applied are retained as records and tracked during fault finding.

Request a Quote

Upload BOM & Files

Our PCBA Production Lines

Frequently Asked Questions

What Files Are Needed to Quote Functional Testing?

When available, provide Gerber or ODB++, IPC-2581, the BOM, schematic, assembly drawing, centroid file, netlist and test-point data, firmware, protocol definitions, power and load sequencing, limits, expected result fields, hardware and firmware revisions, and unit or sample coverage. Existing fixtures, cables, test software, golden units, and known failure modes should also be identified because they influence the development effort, correlation work, and cycle time required to complete the project.

Is Testing Performed on Every PCBA or by Sampling?

Each PCBA is tested or sampled based on the operation rather than one rule for all devices. For example, electrical testing, programming, calibration, and FCT may have 100% coverage because every shipped unit requires confirmation that it has been tested. Conversely, X-Ray, destructive analysis, extended screening, and other forms of testing may use first-article, sample, risk-based, or 100% coverage based on the product and acceptance plan. The quote must include unit or sample coverage, tested functions, limits, reporting depth, and the re-test rule for each operation performed.

How Are Failed Units Repaired and Revalidated?

The failure record links the unit or batch number, failed feature, program or fixture revision, measured evidence, diagnosis, disposition, and repair. After a failure is identified, revalidation repeats the inspection or test results invalidated by the change. Rework may require visual or X-Ray evidence, fixture repairs require contact and correlation checks, and firmware changes require programming verification and repetition of the affected interface tests. PCB or BOM changes may require updates to AOI, netlists, fixtures, and FCT. Final status is released only after the required repeated results are documented.

How Does Test Coverage Affect PCBA Cost?

Test coverage affects PCBA cost because test cost varies based on program and fixture development, access to nodes, inspection depth, testing time, powered loads, instruments used, burn-in duration, diagnosis, repair, re-testing, data retention, and reporting depth. The cost analysis must define the tested functions, limits, stimulus, unit or sample coverage, expected cycle time, and reusable test assets.

Should Testing Precede Conformal Coating?

Testing should occur before conformal coating. Conducting ICT and flying-probe testing before conformal coating allows probes to make direct contact and provides an opportunity to repair electrical faults without removing the coating. Test-point keepouts, masking, cure conditions, electrical test results before coating, and post-coating checks for functionality, leakage, appearance, and repair re-testing should be clearly defined. Shielding and enclosure operations should follow the same access-first sequence because they can remove probe access, change the thermal behavior of the assembly, or complicate fault isolation.