PCB Surface Finishes

Surface Finish by Pad Function

Select each finish by pad function, assembly sequence, storage window, and service duty. SUGA delivers all eight PCB surface finish families from Shenzhen and the Pearl River Delta, each backed by verification evidence assigned to the pad zone it protects.

Surface Finish Families

8 — ENIG, ENEPIG, OSP, HASL (leaded / lead-free), immersion silver, immersion tin, hard gold, soft gold

Verification Methods

XRF, solderability testing, bond-pull evaluation, wear-contact inspection, lot documentation

HASL Qualified Capability Range

2–40 µm

ENEPIG Nickel Range

3–6 µm

What Does a PCB Surface Finish Do?

The purpose of a PCB surface finish is to protect exposed copper and create the appropriate surfaces for soldering, wire bonding, repeated electrical contact, or specific types of RF conductors on each pad located on the PCB. The type of surface finish used, along with the thickness or performance requirements of the finish, is determined based on the pad function and how acceptance of the pad will occur. Unfinished copper can begin to change almost immediately when exposed to air, humidity, or other contaminants through handling. By applying either a metallic deposit or an organic film to the copper pad before assembly, the oxidation process can be slowed. However, even though a pad may appear usable before assembly based only on its appearance or nominal thickness, other factors will ultimately determine whether the solder, bond wire, or mating contact will work as intended, such as local deposit condition, flatness, and heat history.

Copper Oxidation Protection

Oxidized copper does not wet as readily as a fresh, protected surface; therefore, the finish protects the copper pad throughout fabrication, packaging, storage, and handling of the PCB. The degree of protection provided by the finish is directly related to the integrity of the package seal, the package date code, storage temperature, relative humidity, and how long the package has been open. Any of these variables may negatively affect the solderability of the pad surface before assembly and subsequently affect the performance of the pad after it is assembled onto the PCB.

Solderable Pad Surface

The solder connection on any given component has defined geometry, deposit type, surface condition, and thermal history, and each of these aspects will determine how well the component is soldered to the pad. For example, fine-pitch lands require flatter surfaces with more precise control of solder volume than pads used for general through-hole applications. In other cases, the average thickness of the finish does not account for contamination, local deposit damage, or height variations on critical lands. Locations that require repeated electrical contact also require special consideration for wear resistance. The drawing specifies the thickness, performance, and acceptance of the finish based on pad function.

Electrical Contact Performance

A PCB may contain solder pads, wire-bond pads, wear contacts, and RF conductor areas. However, these different areas cannot all be treated generically as a gold or solderable surface because each area has its own parameters that must be considered when designing the electrical contacts. Hard gold supports repeated insertion at edge fingers. Soft gold and qualified ENEPIG stacks support selected wire-bond interfaces. Immersion silver keeps nickel out of selected RF paths. Each area should be treated as its own finish zone with separate transition, measurement, and functional acceptance requirements.

PCB Surface Finish Types

SUGA supports 8 families of PCB surface finishes: leaded or lead-free HASL, ENIG, OSP, ENEPIG, immersion silver, immersion tin, hard gold, and soft gold. Some finishes are used for solderable pads, while others are used for qualified bondable interfaces or sliding and mating contacts that are used repeatedly. An unsuitable finish may first show failure through poor wetting, unstable bond strength, contact wear, storage sensitivity, or RF loss.

Leaded vs. Lead-Free HASL

For HASL, molten solder is used to coat exposed copper and is leveled with hot air. Solder has excellent wetting characteristics and is suitable for general-purpose solder pads, including through-hole pads. HASL can produce inconsistent pad height. Therefore, some very tight pitches and BGA lands traditionally require a different surface finish. In addition, leaded HASL requires a market-specific compliance basis or approved exemption. Lead-free HASL is typically used for RoHS-oriented programs and operates at a higher coating-process temperature than conventional leaded HASL. SUGA supports both; the drawing contains the alloy basis, assembly method, finished-surface acceptance, and any defined pad-height or planarity limits rather than simply calling out HASL.

ENIG PCB Surface Finish

ENIG consists of electroless nickel deposited over copper and a thin layer of immersion gold over the nickel. Nickel is primarily used as a diffusion barrier and thickness-carrying layer, while the gold protects the nickel until assembly. The flat surface of ENIG supports fine-pitch pad designs, BGA pads, plated holes, and qualified aluminum-wire-bond interfaces.

Abnormal nickel corrosion or other improper deposit conditions can lead to black-pad-related failures. Therefore, ENIG acceptance combines the selected IPC-4552B Ni/Au requirement with XRF, surface condition, solderability, and corrosion-related evidence when required.

OSP PCB Surface Finish

OSP is a thin organic coating applied to exposed copper. Since OSP adds almost no metallic height, the pads remain flat for fine-pitch and volume soldering. Because OSP has a thin interface, considerations such as product packaging, product handling, storage timing, test-pad handling, and repeated heat exposure become more critical when working with OSP surface finishes.

OSP surface finishes are designed to preserve solderability for a defined lead-free assembly sequence. The performance basis, maximum package-open time, reflow count, mixed-assembly timing, exposed test-pad handling, and solderability acceptance criteria should be documented during PCB fabrication and assembly. Repacking a part does not restore consumed exposure time; therefore, unnecessary probe contact or heat exposure should be avoided.

ENEPIG PCB Surface Finish

ENEPIG is an acronym for an electroless nickel/electroless palladium/immersion gold surface finish on a PCB. The palladium barrier between nickel and gold broadens compatibility across fine-pitch soldering, mixed packages, and selected wire-bond or contact duties. It costs more than ENIG but can simplify boards that combine several interconnect types when each pad zone receives the correct functional acceptance.

SUGA defines ENEPIG under IPC-4556A based on the use of the board, the type of wire being used, and the required performance. XRF tests are used to determine the thickness of the nickel, palladium, and gold layers but do not guarantee solderability, bond strength, or contact performance. PCB assembly pads must have documented solderability, bond pads must have documented cleanliness and bond-pull tests, and qualified contact areas must be inspected or tested specifically for that interface.

Immersion Silver PCB Surface Finish

Immersion silver involves a flat layer of silver deposited directly onto copper. It supports fine-pitch soldering and preserves a nickel-free conducting surface for use in specific RF applications.

Immersion silver is susceptible to damage from sulfur, chemicals, moisture, and handling. It may also lose some of its nickel-free conductor benefits because of tarnish, creep corrosion, or material migration. Therefore, the method requires approved packaging materials, controlled package-open time, limited direct pad contact, storage records, and solderability evidence when both RF performance and assembly yield must be preserved.

Immersion Tin PCB Surface Finish

Immersion tin is a lead-free PCB surface finish that provides a flat solderable surface; however, immersion tin does not produce a durable contact layer and is well suited for fine-pitch SMT pads because they can be soldered or reworked as long as the finish is correctly managed and remains fresh. Because tin continues to react with the copper beneath it, deposit age, intermetallic growth, residual stress, storage, packaging, and thermal history can alter later solderability or introduce the risk of whisker formation. Using only a date code is not sufficient; the lot record must connect the condition of the deposit at release with how it was packaged, how long it was exposed, its reflow history, and any microsection or solderability data used for release.

Hard Gold for Wear Contacts

Hard gold is alloyed electrolytic gold deposited over nickel for use on edge connectors, gold fingers, keypads, and other applications where repeated contact is necessary. While hard gold can provide long-term wear resistance, its high manufacturing cost and poor solderability make it unsuitable for general PCB solder pads.

Selective plating is a process in which hard gold is deposited only on areas where contact wear will occur. The drawing should specify the plating boundaries, transition areas, nickel and gold thicknesses, hardness or wear-duty rating, acceptable contact resistance, and expected insertion life. If the transition zone is poorly defined, excess gold could be located in a soldering area, or insufficient gold may be available to meet wear-thickness requirements at the contact edge. Therefore, solderable pads located on the same PCB typically require separate finish zones.

Soft Gold for Wire Bonding

Soft gold is made from low-hardness, high-purity material and is specifically designed for wire bonding and selected interconnect applications. Its softness helps form a good bond; however, it also makes soft gold unsuitable for applications involving repeated connector wear.

The wire-bonding requirement should specify the wire material, gold purity and thickness, cleanliness requirements, bonding method, and the required bond-pull acceptance test. If only a generic gold reference is used without additional requirements, the bond surface may be too hard, too contaminated, or too thin for the specified attachment method. Therefore, solder pads and wear contacts must be placed in separate zones with their own acceptance requirements.

PCB Surface Finish Comparison

Before comparing costs, finishes that cannot adequately meet the pad or contact-interface requirements must be eliminated. Begin the comparison by considering pad function, wire material, fine-pitch flatness, wear contacts, press-fit geometry, RF characteristics, heat exposure, and storage time. Only after these considerations have eliminated incompatible surface finishes can a cost comparison begin.

Identify the contact or interface—separate solder pads from wire-bond pads, press-fit holes, and repeated-wear contacts.
Identify the package geometry based on pitch, BGA or µBGA pads, hole types, and connector areas to determine flatness or selective-plating needs.
Identify the electrical and environmental duty—review RF paths, heat, vibration, humidity, and the corrosion resistance of the conductor stack and finish.
Identify production timing—determine packed storage time, package-open time, reflow count, mixed SMT/THT timing, and the rework sequence within the documented assembly window.
Compare the total supplied cost, including coating cost, packaging and handling cost, assembly yield, verification, rework, split-lot handling, and field risk.

Finish	Relative cost	Geometry / planarity	Primary assembly fit	Storage sensitivity	Primary interface	Main procurement issue
Leaded HASL	Low-normal	Low for fine pitch	General soldering; THT	Lower under specified packaging	Solder pads; through-hole areas	Contains lead; exemption or market compliance basis required; uneven coating
Lead-Free HASL	Low-normal	Moderate	Lead-free soldering; THT	Lower under specified packaging	Solder pads; through-hole areas	Higher process heat; limited fine-pitch planarity
OSP	Low	Excellent	Volume solder pads with defined timing	High	Flat solder pads	Handling, storage, exposed test areas, mixed assembly, and repeated reflow
ENIG	High	Excellent	Fine pitch; BGA; plated holes; qualified Al wire bond	Moderate	Solder pads; selected bond pads; plated holes	Nickel corrosion/black-pad risk; RF effect depends on geometry
ENEPIG	High-very high	Excellent	Fine pitch; mixed packages; wire bond; combined interfaces	Moderate	Solder and qualified bond/contact pads	Higher cost; stack and evidence must match interface
Immersion Silver	Normal-medium	Excellent	Fine pitch; soldering; selected RF conductors	High	Solder pads; nickel-free conductor areas	Sulfur, contamination, tarnish, creep corrosion, migration, packaging
Immersion Tin	Normal-medium	Excellent	Fine-pitch soldering	High	Solder pads	Age, intermetallic growth, tarnish, whisker risk, storage
Hard Gold	Very high	Selective contact zone; not a solder-pad finish	Repeated insertion and sliding contacts	Lower on specified contact zones	Gold fingers; wear contacts	Selective area, thickness, hardness, transition, insertion life
Soft Gold	High	Flat bond pad; not a general solder-pad finish	Gold-wire bonding	Moderate	Wire-bond pads	Purity, thickness, cleanliness, bond method, bond-pull evidence

Total Cost After Assembly Risk

There are several reasons why a lower coating price might increase the supplied cost if it conflicts with pad geometry, decreases the usable opening window, necessitates additional solderability testing, reduces assembly yield, or necessitates rework after a later heat cycle.

OSP may have the lowest coating price but a higher overall supplied cost on a board that combines fine-pitch BGA pads, plated holes, longer WIP storage, double-sided reflow, and planned repair.

Surface Finishes for Fine-Pitch BGA

Fine-pitch components impose a hard constraint on planarity because small pads and controlled solder deposits provide little margin for local height variation. Even though a finish may be acceptable for larger pads, on BGA and µBGA patterns, the finish could still affect stencil transfer, solder volume, collapse, or coplanarity at the smallest features.

Pad geometry determines the planarity requirement. Stencil design, the anticipated reflow process, storage time, handling, and inspection also restrict the finishes available for a particular pad geometry. The drawing must show the selected surface finish based on the critical pad geometry, thickness or performance requirement, solderability evidence, and heat sequence.

Surface Finishes for Wire Bonding

Different finishes are selected based on the type of wire being used, but cost should not be considered until the wire type has been established. ENIG has been qualified for aluminum-wire bonding. Soft gold and ENEPIG should be selected according to the wire alloy and bonding method.

When identifying the finish, the wire alloy and how the bond will be made, such as ball or wedge bonding, should be specified. When a PCB also has solder-pad areas or wear-contact areas, they should be treated as separate zones where XRF, cleanliness, bond-pull, solderability, or wear evidence is assigned to the applicable interface. A single gold thickness cannot qualify all functions.

High-Frequency Surface Finishes

Using immersion silver or other nickel-free finishes can reduce finish-related RF loss where high-frequency current would otherwise pass through nickel. ENIG remains a preferred option for applications that require fine-pitch soldering, plated holes, or qualified aluminum-wire bonding.

Frequency, current distribution, trace geometry, copper roughness, and the location of nickel in the active path should all be compared when selecting a finish for RF conductors. RF conductors should be separated from component lands, grounding pads, shielding points, and contact zones. Once RF conductors have been identified, finishes should be selected based on insertion-loss and assembly requirements.

Thermal Exposure Across Assembly

When evaluating how thermal exposure affects solderability and reworkability, the first assembly and subsequent rework processes must be considered separately. Age, contamination, repeated heat, and deposit damage can affect the surface after initial assembly. First-side reflow, second-side reflow, wave or selective soldering, WIP storage, and planned repair can significantly affect the metallurgical and thermal condition of the PCB.

OSP must be tightly controlled because of mixed assembly and repeated reflow. If finished boards are stored for extended periods, storage time and repeated heat exposure can reduce the remaining process margin. Other metallic finishes can tolerate broader thermal sequences when deposit condition and assembly controls are appropriate, but no finish is immune to contamination or damage. State the expected heat sequence, storage condition, package-open time, and inspection required before the next assembly step.

PCB Surface Finish Thickness and Acceptance

When defining PCB surface-finish thickness and acceptability, the PCB should have one controlled layer stack, one drawing requirement, and the required acceptance evidence specified before reviewing the surface-finish thickness ranges in the table below.

The ranges in the table below should not be interpreted as direct metric-to-imperial conversions. The ranges represent separate production or application windows and cannot be combined by taking a minimum value from one row and a maximum value from another row. Each finished-board drawing must select one production or application window and provide the documented evidence corresponding to that finish.

Finish	Layer order	Available range	Unit	Specification use	Acceptance documentation
HASL	Solder coating	2–40	µm	Qualified capability range; drawing-selected	Coverage/local thickness, solderability, visual or microsection as required
ENIG	Ni / Au	Ni 3-5; Au 0.05-0.15	µm	Standard metric production window under IPC-4552B	XRF, surface condition, solderability; corrosion evidence when required
ENIG	Ni / Au	Ni 150-200; Au 3-10	µin	Independent imperial drawing window	XRF, surface condition, solderability, drawing-selected acceptance
ENIG	Ni / Au	Ni 3.5-5; Au >0.025	µm	Alternate qualified metric window	Drawing-selected value and XRF
ENEPIG	Ni / Pd / Au	Ni 100-150; Pd 4-8 or 8-15; Au 1-2	µin	Independent imperial interface window under IPC-4556A	XRF plus solderability, bond-pull, or contact evidence
ENEPIG	Ni / Pd / Au	Ni 3-6; Pd 0.1-0.2; Au 0.1-0.2	µm	Independent metric three-layer window	XRF plus interface-specific functional evidence
Hard Gold	Ni / alloyed Au	Ni 100-150 µin; Au 30-50 µin; gold purity 95.83% / 23 karat	µin	Wear-contact range; selective area and duty defined	XRF, hardness/wear-cycle evidence, contact inspection
Soft Gold	Ni / high-purity Au	Ni 100-200 µin; Au 30-50 µin; gold purity 99.99% / 24 karat	µin	Wire-bond range; method, wire, purity, cleanliness defined	XRF, cleanliness, bond-pull evidence
Immersion Silver	Ag	6-18	µin	Primary imperial production window	XRF when specified, solderability, packaging, surface condition
Immersion Silver	Ag	0.1-0.6	µm	Alternate metric production window	XRF when specified, solderability, packaging, surface condition
Immersion Tin	Sn	25-60	µin	Primary imperial production window	XRF when specified, solderability, age/storage, microsection when required
Immersion Tin	Sn	0.8-1.2	µm	Alternate metric production window	XRF when specified, solderability, age/storage, intermetallic evidence
OSP	Organic film	>0.25	µm	Controlled value under IPC-4555	IPC-4555 performance, J-STD-003D solderability, packaging and process records

The following special-use values apply only to the stated bonding, wear, soldering, or insertion function and do not replace the general production windows above.

Finish / use	Value	Application
ENIG	Au 2-5 µin	Selected IPC-4552B application window; do not merge with other ENIG rows
Hard Gold / gold fingers	minimum 30 µin	Insertion, sliding, hardness, and wear duty
Hard Gold / soldering area	maximum 17 µin	Soldering-area limit; separate wear-contact zones
Soft Gold / ultrasonic wire bonding	minimum 2 µin	Bond method, wire, purity, and bond-pull evidence
Soft Gold / thermosonic wire bonding	minimum 30 µin	Bond method, wire, purity, and bond-pull evidence
Immersion Silver	2-10 µin	Process-specific solderability window
Lead-Free Solder	70-200 µin	Solder-coated pads without tight planarity limits; use only when this drawing window is selected

ENIG Thickness Control

For each drawing, there should be one Ni/Au requirement and one unit system under the applicable IPC-4552B basis. Measurement locations should reflect the critical pad or coupon geometry rather than an area that is simply easy to reach.

The layer thickness at the measurement locations is determined through XRF. The usable interface is determined through surface condition and J-STD-003D solderability, with corrosion or joint evidence added based on the product's risk. A passing average thickness does not negate the presence of a local deposit defect and XRF cannot, on its own, confirm the formation of a solder joint or rule out abnormal nickel corrosion.

PCB Surface Finish Thickness and Acceptance

ENEPIG Layer Stack

When using ENEPIG, a palladium layer is placed between the nickel and immersion gold. The palladium layer provides additional protection for the nickel surface and contributes to the effectiveness of the stack for soldering, wire bonding, or other specified contact duties. As part of the three-layer system, the Pd layer must be verified rather than accepted through a total-thickness reading.

State the specific Ni/Pd/Au requirement under IPC-4556A. A pad's function determines the evidence type: XRF for the stack, solderability for assembly pads, bond-pull for bond pads, or contact evidence for qualified interfaces. Indicate the wire material used for bonding; do not assume that a passing XRF result automatically qualifies all soldering, bonding, or contact interfaces.

Gold Thickness by Function

Hard gold is alloyed to provide greater resistance to sliding and repeated insertion, while high-purity soft gold is designed to support wire bonding. Edge fingers need hardness, transition, contact resistance, and wear evidence; bond pads need purity, cleanliness, bond-method control, and bond-pull evidence.

The drawing shows the various selective areas and identifies where each thickness limit begins and ends. XRF verifies the layer at the specified locations, while the applicable wear test, contact test, or bond test confirms the interface. This prevents a generic gold requirement from causing hard gold to be placed on bond pads or excessive gold to be placed in soldering areas.

HASL and OSP Process Windows

The thickness of HASL varies because of bath condition, board and pad geometry, air-knife leveling, and cooling. These factors cause local variations in thickness and roughness. The primary focus of acceptance is complete coverage, planarity with respect to the actual package geometry, surface condition, solderability, and microsection evidence when required; an average coating value does not demonstrate that the smallest pads are acceptable for fine-pitch assembly.

The OSP organic film is influenced more by copper preparation, packaging, direct handling, age, probe contact, and heat exposure. Therefore, the OSP organic film does not lend itself to the same type of thickness ranking used for metallic finishes. IPC-6012F or IPC-A-600M applies when specified by the board specification, together with the OSP acceptance basis; opening, repacking, and mixed-assembly timing should be traceable to the same lot.

Compatibility by Assembly Process

A PCB can combine a flat solder finish, a bondable gold surface, hard-gold wear contacts, and press-fit holes. These functions should be separated into zones by pad or hole; the finish, thickness or performance window, assembly method, measurement location, and acceptance evidence should then be designated for each zone. This prevents one generic finish note from masking incompatible solder, bond, wear, or press-fit requirements.

Assembly / contact interface	Preferred finishes	Drawing / procurement requirement	Failure prevented
BGA / µBGA and fine-pitch SMT	ENIG; ENEPIG; Immersion Silver; Immersion Tin; defined OSP	Pad geometry, finish/thickness, solderability evidence, reflow sequence	Solder-volume variation, opens, bridges, or uneven collapse
Through-hole and wave solder	HASL; Lead-Free HASL; ENIG/ENEPIG; defined OSP	PTH finish, lead-free basis, thermal sequence, mixed SMT/THT timing, solderability	Incomplete hole fill or poor wetting after mixed thermal exposure
Aluminum-wire bonding	Qualified ENIG; ENEPIG	Wire alloy, pad metallurgy, stack, cleanliness, bond method, bond-pull	Weak or inconsistent bonds from an unsuitable surface stack
Gold-wire bonding	Soft Gold; qualified ENEPIG	Wire material, gold purity/thickness, cleanliness, bond method, bond-pull	Bond failure from unsuitable gold purity, hardness, or contamination
Repeated connector wear	Hard Gold / selective hard gold	Plating area, transition, Au thickness, hardness/wear, resistance, insertion life	Contact-resistance growth and early wear-out
Press-fit contact	Qualified ENIG; ENEPIG; hard gold; or a drawing-qualified selective finish	Finished-hole geometry, stack, finish thickness, insertion force, retention force, contact area, and mechanical/electrical acceptance	Hole damage, unstable insertion or retention force, and contact-resistance variation

SUGA Surface Finish Storage and Opened-Board Windows

SUGA has defined its surface finish storage and opened-board windows, where packed shelf life and opened-board life use different clocks. A receiving decision is made based on package integrity and date code, while the assembly clock starts when the package is opened.

Finish	SUGA packed-storage condition	Packed-storage window	Opened-board condition	Assembly window after opening
Immersion Silver	≤27°C, RH ≤60%; no exposure to acids, alkalis, or organic solvents	6 months	Same temperature/RH; avoid sulfur-bearing materials, direct handling, and contamination	≤48 hours
OSP	≤27°C, RH ≤60%; no exposure to acids, alkalis, or organic solvents	6 months	Same temperature/RH; avoid direct pad contact and unnecessary heat exposure	≤24 hours
ENIG / ENEPIG / Plating Gold	≤27°C, RH ≤60%; no exposure to acids, alkalis, or organic solvents	12 months	Same temperature/RH; protect from contamination and record opening time	≤24 hours
Immersion Tin	≤27°C, RH ≤60%; no exposure to acids, alkalis, or organic solvents	6 months	Same temperature/RH; control handling, age, and exposure time	≤24 hours
HASL	≤27°C, RH ≤60%; no exposure to acids, alkalis, or organic solvents	12 months	Same temperature/RH; protect from contamination and oxidation	≤24 hours

Opened-Board Control

The packed-storage clock begins at production under the specified packaging and environmental conditions. Upon receipt of the board, the receiving records should list the date code, finish, package integrity, and storage condition. Once the package has been opened, the board or lot should be marked, the opening time recorded, and only the quantity that can be assembled within the allowed time frame should be issued. Additional finish-specific handling controls remain in place while the board is staged, inspected, and transferred to the next process before assembly.

Repacking will not reset any recorded exposure. If package integrity, storage conditions, or the allowed assembly window falls outside the specified condition, SUGA will hold the lot for solderability evidence or an approved recovery method. Baking may only be performed when justified by the board construction, moisture exposure, finish chemistry, or the next assembly process. It should not be used as a substitute for missing exposure records.

Surface Finish Failure Modes

ENIG Black Pad Syndrome

Black pad syndrome is related to abnormal nickel corrosion on ENIG or a noncompliant Ni/Au deposit condition. The mere presence of a dark pad does not confirm black pad syndrome. Initial checks should include the XRF result, nickel and surface condition, solderability as defined by J-STD-003D, solder-joint behavior, and affected-lot history against IPC-4552B. Corrective action addresses the deposit process and segregates the affected lot.

Tin Whiskers and Silver Corrosion

Tin whiskers in immersion tin reflect deposit condition, residual stress, intermetallic growth, finish age, thermal history, and storage conditions. During evaluation, the deposit condition, evidence obtained through microsection or microscopy, packaging, date code, and heat history are considered. Sulfur or other contaminants may result in discoloration, creep corrosion, or migration under humidity and electrical bias. Package type, handling, opening time, exposure history, and electrical behavior determine the response.

OSP Wetting Loss and Uneven HASL

OSP finishes are prone to losing wetting performance because of age, humidity, contamination, handling, and thermal history. The checklist includes date code, packaging, opening time, reflow history, pad condition, solder paste when applicable, and profile before recovery instructions are approved. Factors affecting HASL quality include bath condition, board and pad geometry, leveling, and cooling. Acceptance criteria include coverage, local thickness, planarity, surface condition, solderability when applicable, and microsection evidence when required.

Surface Finish Decisions by Application

The highest-risk interface determines which surface finish should be used. It may involve solder-volume control for fine-pitch pads, hole wetting for mixed SMT/THT, conductor loss for RF traces, bond formation for wire-bond pads, wear life for connector contacts, or finished-hole behavior for press-fit areas.

Smartphone Mainboards

Typical smartphone mainboards contain BGAs and fine-pitch pads on the same panel as shield-grounding points, exposed test pads, and board-edge connectors. When a ball lands off-center or an open occurs under a corner of a BGA package, this is typically caused by a probe mark or a height step at the shield frame rather than a low board average. AOI detects gross bridging but may miss corner BGA opens. X-Ray and cross-section analysis detect corner BGA opens that AOI does not. SUGA zones ENIG, ENEPIG, immersion silver, immersion tin, and OSP based on pad pitch and reflow count, while shield-grounding and test-pad areas are treated separately from the rest of the board.

PLC Control Boards

PLC control boards undergo SMT reflow first and are placed into storage before wave or selective soldering completes the PTH terminals. PTH margin is often lost during this storage period: heavy-copper PTHs require more heat to wet than SMT pads, and package-open time in storage can contribute to incomplete hole fill or a dull barrel. Hole-fill percentages determined from cross-sectional views can identify this before field returns. SUGA pairs the SMT-side finish with selective contact plating while tracking package-open time and heat exposure separately from the rework sequence.

Automotive ECUs

Automotive ECUs pair solderable pads with hard-gold-plated connector zones on boards built for years of thermal cycling, where an undefined transition between the two finishes can create failure points. A transition zone that is left undefined can allow gold to creep onto the edge of a solder pad, creating a brittle solder joint that can crack under vibration over time, or leave the edge of the connector under-plated, resulting in increased contact resistance during use. In establishing the boundary for this transition, SUGA defines it based on pad geometry and separates local thickness, transition width, and heat-history evidence from the average thickness of the entire board.

Patient Monitor Mainboards

A passing average thickness on a patient-monitor mainboard does not always reveal local issues with connectors or fine-pitch arrays and can be difficult to identify once the assembly is complete because of the inconspicuous nature of the deviation until the functional testing phase. A contaminated pad row or a deposit gap can surface first as an intermittent contact during functional testing rather than as a coating-thickness failure. SUGA defines specific locations on the mainboard for thickness measurement so that any deviation can be traced back to the specific pad zone and production stage.

5G Radio Units

5G configurations typically route active RF conductors adjacent to component lands, grounding pads, and shielding points. The placement of nickel within these active conductors can have a greater effect on insertion loss than the finish covering the board. Nickel within the active current path can increase insertion loss, while nickel on an adjacent grounding pad may have no significant electrical effect.

SUGA maps immersion silver, ENIG, ENEPIG, and nickel-free options to the actual current distribution, confirming the selected material using XRF and an insertion-loss measurement against frequency and trace geometry.

Avionics Control Modules

Avionics boards may be stored for years, followed by multiple reflow and repair cycles, and each exposure to heat may invalidate the solderability evidence from a previous release. Carrying forward the older record instead of rechecking it is where avionics finish decisions can become incorrect. SUGA verifies thickness, package condition, and solderability at each release instead of continuing to use the original record.

Backplane Connector Cards

Backplane cards have hard-gold wear contacts, solderable pads, and press-fit holes. A weak transition between the different zones can result in increased contact resistance, damage to the hole wall, or insertion force exceeding the specification before reaching the rated cycle count. To prevent these issues, SUGA defines the plating boundaries by interface, verifies thickness and hardness, and verifies hole geometry through insertion-force and contact-resistance testing rather than applying one gold-plating requirement to the entire backplane card.

SiP Modules

SiP modules contain wire-bond pads and solder lands within a small area, and as a result, one gold thickness may not work for both: if the gold surface is too hard, the wire bond may skate, and if the gold is too thin under solder, the joint may starve. To prevent this, SUGA assigns ENEPIG, soft gold, ENIG, or selective stacks to a module based on the wire type and verifies bond-pull results on the wire-bond pads and solderability on the solder lands rather than using one average result.

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Frequently Asked Questions

Can Thickness Values Be Converted Directly?

Thickness values can be mathematically converted from one unit to another; however, the production windows created through these drawing options are independent of one another, so the values cannot be treated as interchangeable ranges. SUGA supports metric or imperial ENIG, ENEPIG, immersion-silver, and immersion-tin production windows. One production range and unit system should therefore be specified for each drawing. Do not combine the minimum thickness from one production window with the maximum thickness from another.

What Is the Difference Between OSP and ENIG?

When handling, package-open time, reflow count, and mixed-assembly timing can be tightly controlled, OSP is suitable for flat, lower-cost solder pads. When fine-pitch lands, BGA pads, plated holes, longer controlled storage, or qualified aluminum-wire bonding are more important than coating price, ENIG may be more suitable. The complete assembly sequence and interface duty should be considered, not only the coating price.

Can One PCB Use Multiple Surface Finishes?

Yes. One PCB can use a solderable finish on component pads, hard gold on repeated-wear contacts, and a bondable gold stack on wire-bond zones. The drawing should indicate the boundaries, transitions, thicknesses, measurement locations, and pad duties and assign XRF, solderability, bond-pull, contact-resistance, or wear evidence to each interface.

Is ENIG Better Than HASL for PCB Assembly?

ENIG is suitable for PCB assemblies when fine-pitch components, BGA lands, plated holes, or consistent solder volume require a flatter surface than HASL. On the other hand, HASL may be preferred for through-hole assembly or general-purpose soldering where coating-height variation is acceptable. Leaded HASL requires an applicable compliance basis or exemption, while lead-free HASL introduces higher coating-process heat. Consider the complete PCB assembly sequence and supplied cost when comparing ENIG and HASL.

Which PCB Surface Finishes Support Wire Bonding?

Qualified ENIG is used for aluminum-wire bonding, soft gold supports gold-wire bonding, and ENEPIG can support multiple wire systems when its Ni/Pd/Au layers match the bonding method. The drawing must state the wire alloy, bonding method, deposit thickness, purity or cleanliness, measurement location, and bond-pull acceptance. A generic “gold” callout is not sufficient.

Immersion Silver vs. ENIG for RF Performance

Immersion silver should be considered when keeping nickel out of an active RF conductor path is important and sulfur exposure, contamination, packaging, and opening time can be controlled. ENIG should be considered when fine-pitch soldering, plated-hole compatibility, or qualified aluminum-wire bonding is more important. Compare frequency, current distribution, trace geometry, copper roughness, nickel location, assembly interfaces, and the insertion-loss target rather than applying one finish to all conductors and pad areas.