PCB Manufacturing Capabilities

Custom PCB Manufacturing Range

Each PCB's stack-up, materials, copper pattern, hole configuration, finished thickness, outline, and verification plan are unique to that PCB. A stack-up that is viable as a standalone may not be reproducible if combined with large panels, high-aspect-ratio designs, fine conductors, heavy copper, or tight dimensional tolerances.

Standard multilayer processing is suitable for stable raw materials and routine drilling, copper, and profiling processes. Custom boards require custom lamination cycles, laser-drilled or controlled-depth-drilled holes, resin-filled areas, thermal interface materials, flexible or low-loss materials, or unique profiling processes.

PCB Layer Count and Board Size

The PCB layer count, finished thickness, finished board size, copper distribution, dielectric plan, and panel size for mass production should be evaluated together. More layers increase registration interfaces, which may increase the number of lamination cycles, while thinner or more copper-heavy boards decrease the process margins for drilling, plating, flatness, and dimensional control.

The manufacturing capabilities of 535 mm × 610 mm for finished board size and 600 mm × 1200 mm for production panel size are not interchangeable. PCB manufacturing requirements such as tooling, coupons, edge clearance, profiling methods, material movement, and copper balance occupy usable areas of the panel; therefore, larger outlines on thick, thin, hybrid, or unbalanced stack-ups require a dedicated panel review, including yield.

PCB Trace and Space Limits

The 4/4 mil, 3/3 mil, and 2/2 mil limits are not interchangeable artwork rules. Each design has a separate process window. For example, fine inner conductors on thin copper use a different etch-compensation window from thick outer power traces. Thick finished copper and solder-mask coverage require wider spacing than fine lines on thin copper.

A 2/2 mil HDI feature must be evaluated relative to other factors, including layer position, copper foil, panel size, material movement, via capture geometry, and inspection access. Combining minimum line and space with heavy copper, large formats, or tighter registration may also inhibit repeatability, even though the minimum line and space values are listed in the capability table.

PCB Hole Geometry and Stack-Up Limits

Finished-hole size, drill size, plating allowance, board thickness, and aspect ratio require separate identification in the fabrication data. PTH hole diameter must be measured after plating; NPTH holes do not receive the same plating allowance, and the 0.05 mm NPTH capability must not be interpreted as a 0.05 mm conventional mechanical-drill limit. Blind or buried vias, laser microvias, slots, and back-drilled holes each require separate layer references, capture geometry, depth or residual-stub targets, and verification methods. During an annular-ring margin check, SUGA verifies the following items against the approved stack-up: hole position, capture land, plating distribution, and residual-stub requirements.

Copper Weight and Controlled Impedance

Controlled impedance is determined from the finished conductor geometry and dielectric thickness, not based on copper weight alone. It is necessary to distinguish base copper from finished copper because plating and etch compensation change conductor width and profile, while pressed dielectric thickness, the Dk/Df testing basis, copper roughness, finish, and coupon construction all affect the measured result. Therefore, single-ended and differential targets, tolerances, layer references, and test conditions must all be listed in the impedance table and matched to the production coupons.

PCB Feature Limits and Verification

PCB Manufacturing Process Controls

1. Data Preparation and Inner Layers. Gerber, ODB++, or IPC-2581 data are compared with the drill files, netlist, stack-up, impedance table, and fabrication drawing. During the release process, the review distinguishes finished holes from drill tools; PTH, NPTH, microvia, slot, and back-drill data; layer references; copper weights; and document revisions. Inner-layer imaging and etching are then completed, with conductor geometry inspected and verified through AOI before those geometric features are hidden by the stack-up.

2. Lamination and Drilling. The lay-up records validate the identity of the material used, the sequence of layers, dielectric targets, copper balance, press-cycle history, and sequential lamination. Mechanical, laser, and controlled-depth drilling are released with the required hole basis, layer reference, entry and backup method, and residual-stub targets. Registration coupons and microsections verify the alignment between drilling and lamination against the approved construction.

3. Plating and Finishing. The manufacturing process verifies that desmear, hole metallization, via fill where required, and copper plating are performed in accordance with the approved drawings to produce finished hole-wall and outer-layer copper. This step controls copper distribution and surface-finish thickness, as well as solder-mask registration and dams, legend, routing datum, V-score residual, bevels, and copper-inlay interfaces, validating that the finished profile matches the approved drawings.

4. Inspection and Electrical Testing. All PCB electrical testing and inspection methods, including AOI or AVI, dimensional inspection, copper measurement, microsectioning, impedance TDR, cleanliness testing where specified, and bare-board electrical testing, must be reported against the applicable production lot and the drawing revision used to produce that lot. By tracking the measurement method, feature measured, sampling or coupon basis, measured values, and pass/fail status in the report package, these reports verify that the product meets the intended requirements.

Advanced PCB Structures

Key constraints include microvia registration, bend fatigue, current density, local heat flow, dielectric loss and residual via stub.

HDI PCB Manufacturing

The HDI PCB design is best suited for designs requiring escape routing for BGA packages when traditional through-hole layouts cannot accommodate the design's functionality and electrical characteristics. Advanced HDI systems can provide stacked, staggered, 1+N+1, 2+N+2, 3+N+3, or any-layer interconnections. The feasibility of an advanced HDI design depends on the target and capture land area, the thickness of the dielectric material, the copper and fill requirements for the microvias, the total number of lamination cycles, and the tolerances needed to ensure registration across all layers. The stated 0.05–0.075 mm laser-drilled range requires the diameter basis to be defined in the fabrication data. Stacked microvias add cumulative registration and fill requirements, while via-in-pad requires planarity after fill and cap. The manufacturing data should identify microvia layers, stack or stagger arrangement, fill condition, copper target, and coupon plan so microsection and registration results represent the actual build-up.

Flex and Rigid-Flex PCB Manufacturing

Flex PCB designs can satisfy additional design needs, such as space limitations, movement, and three-dimensional assemblies. The objective of a Flex PCB is to find the optimum combination of copper type, grain orientation, trace orientation, openings in the coverlay, adhesive or adhesiveless materials, termination points, and clearance distances from holes or pads that will reduce conductor fatigue and avoid coverlay cracking. Dynamic bends and installation bends require different bend-radius and cycle assumptions, and neither should be approved based only on the finished thickness of the PCB.

A fabrication drawing should indicate the locations of bend zones; the direction of the bends, where applicable; the locations of stiffeners and coverlay edges; the locations of controlled-impedance flex layers, where required; and connector-support dimensions so that the finished board can be checked against its intended use.

Heavy Copper PCB Manufacturing

Heavy copper carries high current and distributes thermal energy across a wide area. Copper inlay places the current and thermal path locally at the point of loading. The up-to-10 oz inner-layer and up-to-15 oz outer-layer values correspond to the copper thickness of the finished layer, while the up-to-1000 μm value indicates the maximum thickness of dedicated heavy-copper or copper-inlay structures and does not apply to all conductors in a standard stack-up. The features of the thermal path are determined by spacing, copper neck-down at the pads and vias, resin fill between features, press thickness, plating distribution, flatness, solder-mask step coverage, and the interface condition where an inlay is used. High-current and heat-transfer features must be verified by cross-section, copper measurement, dimensional inspection, and electrical testing for each specific feature.

High-Speed PCB Manufacturing

High-speed PCB manufacturing requires the Dk/Df, dielectric thickness, copper roughness, conductor profile, and impedance target to be resolved within one stack-up. Material data should list both the basis and frequency of the Dk/Df tests. The impedance table must include the copper reference, layer reference, target, tolerance, and test conditions.

Hybrid laminates introduce the constraints of bonding, resin flow, material movement, and registration. Connector launches introduce datum and antipad dependencies. Back drilling introduces drill-side, layer-reference, finished-thickness tolerance, and residual-stub targets. TDR can verify the matched coupon or defined path, while drill records and microsections can be used to verify the back-drill depth and remaining stub, where applicable.

Prototype-to-Volume PCB Manufacturing

The Prototype stage allows users to prove that the design data can result in a functional board, while the Engineering Lot, Low Volume, and High Volume manufacturing stages solidify the materials, panels, tooling, coupons, inspection, testing, traceability, and change rules required for repeatability.

Quick-Turn PCB Manufacturing

Only after successful closure of the questions surrounding the release of a Prototype PCB will SUGA supply project documentation verifying the stack-up, available materials, copper, hole tables, outlines, impedance definitions, critical dimensions and tolerances, and netlist. While quantities remain low during the Engineering Lot and early production-volume stages of the PCB manufacturing process, all documentation will be available for project review. This review must also identify which items are provisional and which must remain fixed for the next revision. Flying-probe testing verifies netlist connectivity without dedicated test tooling, while dimensional inspection, microsection, or TDR is added when physical dimensions, plating, or impedance require verification.

Standard PCB manufacturing processes can generally support 24-hour quick-turn PCB manufacturing after receiving the appropriate approval. A standard process normally requires 3–5 days for completion. The completion time for both Quick-Turn PCB Manufacturing and standard PCB manufacturing depends on receiving complete and internally consistent production data and on the PCB construction meeting the material, drilling, finishing, panel-size, and verification windows defined in the project documentation. HDI, rigid-flex, special materials, heavy copper, large formats, special finishes, and extended coupon or inspection requirements follow the cycle required by their structure; delivery is confirmed after that process is defined.

The characteristics of an Engineering Lot include confirmation of interactions that a prototype may not detect. These include drill and plating behavior across the panel, dimensional distribution, coupon representation, impedance repeatability, electrical-test results, finish consistency, panel utilization, and approved design changes. The output of the Engineering Lot consists of the released stack-up, available material selections, panel concept, testing strategy, inspection plan, and list of controlled changes to be carried into volume production.

Low-Volume to High-Volume PCB Manufacturing

Initial panel utilization, approved alternate material lots, tooling, coupons, electrical-test strategy, inspection sampling, traceability, and yield are reviewed together. Each design revision is compared with the released stack-up to ensure that changes to copper, drilling, dielectric, outline, or panelization do not silently invalidate plating, registration, impedance, flatness, or previous production data.

High-Volume PCB Manufacturing focuses on controlled production data and includes the production-data revision, material options, panel configuration, process controls, inspection and test results, marking, and change-notification details for each lot. Therefore, yield and defect patterns have little value unless the process inputs remain consistent. Repeatability means that the specified board characteristics continue to result from the approved construction and control plan, not merely that the same part number is reordered.

Prior to volume production, the engineering and purchasing departments define rules for material substitution, critical dimensions and datums, coupon disposition, test files, finish requirements, serialization and lot definitions, report retention, and thresholds for approval and notification.