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BGA PCB Assembly Services
China BGA PCB Assembly Supplier With Under-Package Joint Inspection
Fine-pitch placement, package-specific reflow, X-ray inspection and either electrical testing or FCT are sequenced together.
0.4 mmBGA Pitch
2,500Max Balls/Package
Class 3IPC-A-610
40LPCB Layers
What Is BGA PCB Assembly?
BGAs are soldered directly onto circuit boards like other surface-mount components. However, unlike components with visible perimeter leads, a BGA has solder balls positioned beneath the package body, providing many electrical connections within a compact footprint. Because the solder balls are located under the package body, the interconnection paths are short. This arrangement hides the solder joints, which requires the printing, placement, reflow and inspection steps to be executed as part of one controlled process.
The purpose of the BGA package is to connect a high-I/O IC, also called a semiconductor device, to the PCB. The BGA package allows the semiconductor manufacturer to add more connections to the product without placing all lead connections around the perimeter of the package, thus maximizing the use of board area. The BGA package can also transfer heat away from the semiconductor through the substrate material and solder-joint field. However, the effectiveness of this method at transferring heat from the semiconductor to the PCB depends on the type of device selected and the PCB design.
Since an operator cannot visually inspect all solder connections after reflow, special precautions are required when soldering BGA packages. Additionally, fine-pitch components create less margin for errors such as paste-volume variation, placement error, package warpage and contamination. Rework on these components also exposes the device, pads and nearby components to another thermal cycle.
What Does a BGA Package Do?
The BGA package drawing shows the body dimensions, mechanical limits, pitch and ball map, which defines the arrangement of ball connections on the underside of the package. All these factors must be followed by the PCB designer and assembly engineer during the design and assembly of BGA packages.
Solder balls form the on-board connection during reflow; they do not remove the need for solder paste or process control. Solder paste printing and location, component alignment and the measured thermal profile affect joint wetting and collapse. Package design and thermal mass also influence joint heating and package warpage.
Board flex, package warpage and moisture exposure can raise reliability or rework risk.
Package Fabrication vs. BGA Assembly
SUGA’s BGA assembly services do not include die attach, internal interconnections, substrate fabrication or other semiconductor packaging processes. When comparing package suppliers and PCB assembly manufacturers, distinguish between BGA assembly and package fabrication.
Package Types
BGA designations represent different package families and provide only a starting point. The assembly specifications for a component are derived from information such as the component drawing, ball map, moisture label, package construction, warpage information and board escape design. A generic family name cannot define one universal pitch, moisture level or thermal value; each family includes individual components that use slightly different materials and processes.
For example, plastic, ceramic, tape-based, laminate and flip-chip packages vary in how they absorb moisture, bend or flex under load and respond to heat. Since LGA packages do not contain formed solder balls like a BGA, the paste deposit, standoff and rework conditions for an LGA are based on the manufacturer’s recommendation for that specific component rather than assumptions used for a BGA.
The following table lists examples of how different package types vary in assembly sensitivity and finished-assembly inspection.
| Package Family | Typical Construction or Interconnect | Main Assembly Sensitivity | Inspection Implication |
|---|---|---|---|
| PBGA | Plastic or organic substrate with solder-ball array | Part-specific moisture handling, package and PCB warpage, and paste transfer for standard or fine pitch | Match the package drawing, MSL label, floor-life history, thermal reflow results and under-package imaging method |
| CBGA | Ceramic substrate or body with solder-ball array | Board stiffness and thermal mass are greater for ceramic packages than for plastic packages, and CTE interaction between the PCB and component must be considered | Confirm board support, profile measurement and joint acceptance for the specific device |
| TBGA | Tape or flex package construction | Very thin package construction, handling sensitivity and fine interconnect density can narrow the process tolerance | Confirm the handling method, coplanarity, paste transfer and imaging access |
| FCBGA | Flip-chip die attached to an organic or laminate substrate with external BGA balls | High I/O, package mass, power density and warpage may interact during thermal reflow | Use a package-specific profile, appropriate support and under-package solder-joint results; do not rely on the package name alone |
| µBGA | Miniaturized BGA family with a small body and fine interconnect structure | Reduced paste and placement margin, with limited optical access | Coordinate the pad, stencil, placement and X-ray method |
| WLCSP | Package dimensions close to the die with solder bumps or balls at wafer level | Very small joints, fine pitch and board-level strain sensitivity | Confirm PCB land design, paste transfer, PCB finish and required end-use stress conditions |
| Stacked BGA / PoP-related package | Vertically stacked package structure or package-on-package arrangement | Package height, thermal shadowing, paste or flux method and multi-interface alignment | Define the stack assembly sequence and electrical verification methods before assembly starts |
Flip-Chip BGA
FCBGA board-level joints depend more on package planarity, substrate behavior and PCB warpage than on the die-attach method itself. Profile measurement points must be based on the actual package drawing, including body size, ball map and warpage limits. A single center-of-board measurement may fail to identify localized warpage from a large package near its edges. Imaging of the area beneath the package must be based on what is accessible because of the surrounding hardware and package geometry.
Miniaturized BGA Packages
Micro BGA and WLCSP assemblies compress the margin for each individual process step at the same time. An error in stencil transfer, land geometry or vision alignment at one process step can consume the margin needed for subsequent steps, allowing errors to accumulate in a way that individual-defect QC checks may not detect.
Bump geometry, pitch and package height are determined from the device drawing. WLCSP dimensions sit close to the die itself, so board flex and drop exposure should be considered in the reliability plan alongside paste and placement. Micro BGA assembly also requires an imaging method capable of resolving the selected joint field.
Assembly Process
The assembly of BGAs comprises a controlled sequence rather than a single soldering operation. The process begins with the condition of the package and then continues to paste, placement and reflow, with visible, under-package and electrical results assigned at the appropriate stages. Each stage must have an acceptance criterion and a measurable result.
Incoming material control covers the part number, package drawing, MSL label, moisture barrier bag, humidity indicator and recorded exposure. Assembly will not start if the package is damaged, its exposure history is uncertain, or there is a conflict between the part number, package drawing, MSL or documented exposure.
When Does a BGA Package Need Baking?
The decision to bake a BGA package depends on the device classification and moisture-exposure record. The operator verifies that the package is sealed, checks the humidity indicator, reviews the floor-life history and follows the component instructions. Dry storage can preserve an acceptable condition, while baking restores a defined condition only when the specified handling procedure requires it.
IPC/JEDEC J-STD-020F identifies the MSL classification context. IPC/JEDEC J-STD-033D identifies the handling, storage and baking processes for components based on the manufacturer’s specifications. There is no single time-and-temperature combination that can be used for all BGA packages because package materials, moisture sensitivity and exposure affect the required baking conditions.
If the package label, package status or exposure record cannot provide adequate information for the planned reflow process, assembly should stop. Corrective action must follow the applicable device and handling requirements rather than an assumption applied to an entire package family.
BGA Paste Deposition Control
BGA production generally uses solder paste unless the specified package and process use another qualified method. Paste deposition is controlled through the stencil foil, aperture geometry and paste system.
SPI converts the physical paste deposit into quantitative data and measures its height, area, volume and offset before the component covers the site. Abnormal deposits, such as insufficient paste volume or excessive offset, should be corrected during the printing operation.
The exact deposit requirements or exceptions vary according to the package specifications and process.
Precision Placement
Vision placement aligns a package with a PCB by referencing the defined centroid data, rotation and fiducials. Placement control covers component identification, the suitability of the feeder and nozzle, component body support, PCB support and package coplanarity. A large, heavy package and a small, compact device may move differently when placed on the same placement line.
Production records should establish a link between first-pass placement evidence, the board revision and the PCB control plan. A theoretical machine-accuracy figure does not demonstrate that a package was placed within its defined conditions. Package support and PCB stability are as critical as machine accuracy.
Any condition outside the defined process window for identity, rotation, fiducial recognition, support or coplanarity will stop placement. Corrections must occur before the PCB enters the reflow process.
How Is BGA Reflow Controlled?
The thermal conditions established by the solder alloy and component limits, together with PCB thickness, copper distribution, package mass, component mix, moisture condition and allowable warpage, affect the measured profile. There is no single universal BGA reflow temperature suitable for every assembly.
Engineers evaluate representative locations on the actual assembly and analyze heating, time in the required process region, package and PCB deformation, wetting and cooling behavior. Multi-zone reflow systems allow control of the measured profile. Nitrogen may be used when alloy, oxidation, wetting or assembly requirements justify it. Joint quality also depends on paste transfer, the measured profile, package behavior and inspection results.
Lead-free SAC305 and Sn63/Pb37 soldering processes may be used when specified and compatible with the product, finish, components and documentation.
Fine-Pitch Assembly Limits
Pitch alone does not guarantee manufacturability. Pad, via, stencil, support, placement, reflow and imaging requirements must agree.
| Capability Area | Standard Process Window | Conditional Process Window | Qualification Condition |
|---|---|---|---|
| BGA ball pitch | 0.4 mm pitch BGA assembly | 0.3 mm process; 0.25 mm-class packages by dedicated engineering assessment | Package drawing, ball geometry, pad/via design, stencil, placement, reflow and imaging methods must align |
| Package families | PBGA, CBGA, TBGA, FCBGA, µBGA, CSP, WLCSP and stacked BGA packages | Unusual package construction, stacked interfaces or high-warpage/high-mass devices by package-specific qualification | Package acronyms alone do not define the manufacturing process |
| Package size | Miniature chip-scale packages through large BGA packages | Up to 60 × 60 mm packages when board support, thermal mass, warpage and imaging field are confirmed | Body size, weight, coplanarity, support and reflow measurement locations |
| Ball count | Standard and high-I/O packages | Up to 2,500 balls per package | High-ball-count route requires defined warpage, profile and under-package imaging coverage |
| PCB layer/HDI support | Multilayer PCB and conventional fanout | Up to 40 layers; any-layer HDI up to 24 layers; 0.10 mm laser microvia; 0.25 mm microvia pad | Use only where the selected PCB design and qualified fabrication route support the BGA escape strategy |
| Board thickness | 0.4–6.0 mm supported | Thick, heavy-copper, highly asymmetric or thin-flexible boards require dedicated support/profile assessment | Board material, copper balance, panel support, bow/twist and reflow behavior |
| Maximum board size | Up to 600 × 500 mm supported | Large/heavy boards by conveyance, support, thermal and inspection assessment | Confirm the actual assembly panel, not only finished-board dimensions |
| Solder alloy | Lead-free SAC305 process | Sn63/Pb37 process when specified, legally appropriate and segregated | Alloy, finish, component compatibility, profile and documentation must be aligned |
| Stencil | Typical 0.08–0.15 mm foil thickness | Step stencil or local aperture optimisation for mixed pitch/component demand | Final foil/aperture design is package- and assembly-specific |
| Reflow atmosphere | Controlled multi-zone reflow | Nitrogen available where oxidation, wetting, alloy or customer requirements justify it | Atmosphere is a process option, not proof of joint quality by itself |
| Double-sided BGA | Supported where board layout and first-side package exposure permit the selected sequence | Overlapping BGA fields or high-mass packages require support, second-reflow and X-ray interpretation assessment | Assess first-side joint remelt, package movement, board sag and image overlap |
Fine-Pitch BGA Design Conditions
Registration between the copper land and solder-mask opening ultimately determines which pad definition applies at a given site. SMD pads allow the solder mask to reduce the effective land area, which can improve standoff but concentrates stress at the solder-mask edge, whereas NSMD pads depend on etch tolerance and require tighter fabrication control as pitch becomes finer. Using the wrong pad definition for the specified package does not simply shift wetting to one side of the ball—it also alters the standoff height and stress distribution on which the reliability plan was based. The final land pattern must match the package drawing and board finish before release.
When escape density leaves insufficient space for conventional fanout, via-in-pad becomes necessary. Once this requirement arises, the fill/cap process drives the outcome. If the via is unfilled or poorly capped, solder paste and gas can escape into the via barrel during reflow, starving the joint of solder in a way that can be difficult to distinguish from a genuine void during inspection. Laser microvias of 0.10 mm and microvia pads of 0.25 mm may be used to support HDI structures, subject to the final stackup and reliability requirements.
BGA Paste Transfer Control
The typical thickness range for stencil foils is between 0.08 mm and 0.15 mm. However, a single thickness may become unsuitable when fine-pitch BGA packages and larger components requiring greater paste volume are included on the same panel. An aperture sized for the larger component can over-print the BGA site, while an aperture sized for the BGA can starve the larger component. A step stencil avoids forcing one compromise foil thickness across the entire board by allowing different thicknesses in selected zones. Aperture geometry, paste condition and PCB finish ultimately determine paste transfer within each zone.
Detecting the same print defect after reflow requires a decision on whether to rework the affected assembly. If SPI is not performed on fine-pitch BGA sites, detection of the same defect moves downstream to X-ray, where it is substantially more costly to identify and correct.
| Design or Process Factor | What Must Be Assessed | Manufacturing Consequence | Expected Manufacturing Result |
|---|---|---|---|
| Package drawing and ball map | Pitch, body size, ball diameter, depopulation pattern, package height and manufacturer limits | Controls land geometry, paste deposit, placement and inspection method | Final package data tied to BOM and revision |
| SMD vs. NSMD pad | Copper land, solder-mask opening, fabrication tolerance and package recommendation | Changes wetting, stress distribution and solder-joint geometry | DFM note and final pad/mask dimensions |
| Via-in-pad | Escape density, via type, fill/cap process and final planarity | Open or poorly finished vias can remove solder and create uneven joints | Filled/capped via requirement, planar finish and fabrication evidence |
| Stencil/aperture | Foil thickness, aperture size/shape, area ratio, mixed-component demand and step region | Determines paste transfer and balance between fine-pitch BGA and larger components | Final stencil data and first-pass SPI output |
| Solder paste and finish | Alloy, powder class where applicable, flux system, PCB finish and storage | Affects print transfer, wetting, voiding and profile window | Material identification, storage control and process record |
| Placement | Fiducials, centroid, rotation, nozzle/support and package coplanarity | Misalignment or unstable support can reduce self-alignment margin | First-pass placement/AOI evidence according to the control plan |
| PCB stackup/support | Thickness, copper distribution, local stiffness, panel rails and support pins | Affects board sag, thermal gradient and package/board warpage interaction | Final stackup/panel and support plan |
| Reflow profile | Alloy, package mass, MSL condition, board thermal mass, component mix and atmosphere | Controls wetting, ball collapse, warpage timing and residual stress | Measured profile on a representative assembly and process record |
| Under-Package Imaging Access | Package overlap, shielding, heat sink, board thickness and field of view | Determines whether 2D X-ray is sufficient or oblique/3D imaging or complementary results are needed | Defined imaging method, coverage and inspection record |
| Underfill | Shock/drop, thermal cycling, board flex, moisture environment and future repairability | Can improve mechanical support in selected applications but increases rework difficulty | Customer/end-use requirement and documented material and process conditions |
| Post-Assembly Electrical Access | Test pads, boundary access, connectors, firmware and test fixtures | Determines whether opens/shorts and final function can be independently verified | Test coverage tied to board revision |
When Does Underfill Change the Process?
The use of underfill is a conditional reliability decision that depends on the stresses experienced by the product during use. The decision to use underfill is generally determined by dominant end-use stresses rather than an overall list of risks associated with the BGA. A BGA that will only experience bench-level handling will typically not require underfill. However, if the product is subjected to repeated drop events, sustained vibration or thermal cycling that may damage the joints because of a CTE mismatch, underfill may change from optional to specified.
In addition to the stresses associated with the end use of the product, package size may also affect the need for underfill. Larger, stiffer packages transmit more of the imposed stress to the solder-joint field. Thus, the decision to use underfill should integrate the attributes of the specific package with those of the end use rather than rely on a generalized list of risks associated with BGAs.
Once underfill has been specified, the cure conditions and material type become controlled manufacturing conditions rather than an add-on step after production. Failure to select an appropriate material or the use of incorrect curing conditions can create reliability risks for the completed assembly. The decision is also difficult to reverse. Underfill can restrict inspection access and substantially hinder future rework. Therefore, the decision to use underfill must be established and documented against the end-use requirements before assembly. It should not be applied afterward as a blanket protective measure or used to overcome deficiencies in solder-joint formation.
The DFM documentation needs to connect the materials in the BOM, package data and PCB before manufacturing begins. It should also cover paste-transfer conditions, board support, inspection access and repairability, with the underfill decision recorded as part of the same review.
Inspection of Under-Package Joints
The sequence of BGA inspection is determined by the assembly process rather than by treating a single inspection system as complete proof. The required coverage is based on the package, PCB design, solder-joint risk and available electrical access.
How Is BGA Inspection Sequenced?
Before the component covers the BGA site, SPI measures the solder-paste deposits. Placement and visible assembly features are then assessed through the defined AOI process, including package presence, orientation, polarity where applicable and gross placement. After reflow, solder distribution, alignment, bridges, gross opens and void patterns beneath the package can be assessed using X-ray or AXI.
Tests such as ICT or flying probe assess accessible electrical networks for shorts, opens, continuity and selected component behavior. FCT applies the defined inputs, loads, interfaces and firmware to verify board behavior. These diagnostic methods answer different questions and are assigned according to the assembled board design and available test points.
What Defines BGA Acceptance?
X-ray coverage depends on the control plan and may include sampling, FAI, risk-based inspection or 100% evaluation. The control plan defines the package to be inspected, required views, inspection method and retained records. Oblique or 3D X-ray or CT may be used when overlap, shielding, board thickness, double-sided BGA fields or failure analysis make a 2D image ambiguous.
BGA acceptance criteria comprise joint limits defined by the package or requested by the customer, IPC-A-610 Class 2 or Class 3 when specified and the applicable IPC J-STD-001J soldering requirements. IPC-7095E provides guidance for BGA design and assembly. FAI provides the initial result for a new BGA design or an approved design change. Traceability links the component material lot/date code, board or serial identification and inspection records to the correct lot and revision.
What Causes BGA Assembly Defects?
Defects associated with BGAs include voids, head-on-pillow defects, open joints, bridges and package-side cracks. Although these defects may produce similar failure symptoms, they do not share one root cause. Diagnosing a BGA assembly defect begins with identifying the observed evidence and then distinguishing between paste, wetting, alignment, warpage and thermal-stress mechanisms before correction.
Solder Joint Voids
Voids in solder joints originate from empty regions caused by gas, flux behavior, paste condition or the specific thermal pathway during solder-joint assembly. An X-ray can locate the voids and show their distribution, size or area; however, the X-ray does not indicate the degree to which the voids will affect electrical performance or the final application.
Engineers should relate the void location and size to the paste material, paste storage conditions, atmosphere and package-specific heating. Pass/fail inspection methods depend on defined criteria; therefore, a single percentage figure cannot be applied to all solder joints regardless of application or package configuration.
Head-on-Pillow Defects
Head-on-pillow defects are identified when the ball from a BGA appears to contact the surface of the paste deposit during the soldering process but does not form one continuous metallurgical joint because of paste condition or package warpage. Package warpage and the timing of solder wetting during reflow are two critical factors that can lead to separation between the BGA ball and the paste deposit.
A head-on-pillow defect may look like a complete metallurgical joint but lacks a true metallurgical connection. Use data and images to distinguish head-on-pillow defects from traditional open joints. When reworking a head-on-pillow defect, address BGA coplanarity, package warpage and the thermal window during soldering rather than simply adding more paste.
Opens Versus Bridges
An open solder joint does not have a continuous electrical connection. Inadequate solder-paste volume, contamination, oxidation or insufficient wetting can cause an open solder joint. A bridge is an unintended electrical connection between two conductors caused by excessive solder-paste deposition, poor stencil transfer or misalignment.
The causes of open solder joints and bridge solder joints point in opposite directions; therefore, it is not possible to correct both situations using the same method. Use process-related data and images to determine whether paste, surface preparation, placement or profile correction is required before reworking a solder joint.
Solder balls found after reflow also need context. Loose or unintended solder can come from paste behavior, deposit conditions or the thermal process; it should not be confused with the designed ball array beneath the package.
How Does Warpage Cause Cracks?
Package and board deformation change the load on the joint while solder is hot and during cooling. A thermal gradient, package structure, shock or internal stress can create a package-side crack or hot-tear mechanism. Large packages and thick substrates can raise that interaction.
The fracture location matters. A package-side interface crack is different from lifted or damaged PCB pads, and each one changes the rework decision. Profile changes address the thermal mechanism only when the evidence shows that timing and deformation caused the failure.
Rework and Reballing Services
When a PCB is subjected to additional thermal cycles during the rework process, the effects of those cycles on component and pad adhesion, localized heating from rework and other related factors must be considered. If possible, rework should be limited to packages whose thermal history can be confirmed as acceptable.
Before the actual rework process starts, identify the source of the failure.
Component Removal and Site Preparation
When preparing the target site for package installation, maintain a controlled temperature profile so that the correct solder temperature is reached. This helps prevent premature pad lift, which can occur if the solder has not fully reflowed before the package is lifted. This is especially true with larger and heavier packages.
Analyze the target site before beginning any rework. The thermal history of the board will influence the outcome of the removal and installation processes. The decision should be based on the thermal profile, package history and other relevant variables.
Reball or Replace?
For both reballing and replacement, the same basic assessment applies. Reballing involves restoring the external ball array on a package that is still functional. Replacement involves removing a package that is unusable or whose condition does not support reuse. Reballing may also be performed as part of a controlled production process, for example, when a new assembly is built using a known setup.
Both reballing and replacement should be considered on a case-by-case basis and will vary depending on the condition of the package, the environment to which it has been exposed, including heat and humidity, and other variables.
Can the Board Survive Another Thermal Cycle?
Contamination, the quality of the removal and preparation processes, and the cumulative effects of previous thermal exposure will all contribute to the ability of the package and PCB to survive another thermal cycle.
Rework should follow IPC-7711/21D when specified, and the site should then be inspected using the defined inspection process. In addition, the inspection record should document the thermal equipment and other equipment used during removal and installation. The inspection report should document the thermal history and current pad condition of the board. These records help establish a history for that specific board.
BGA PCB Assembly Applications
Aerospace Control PCB
The combination of thermal cycling and vibration loading places the greatest stress on the interconnects between the package and the board in aerospace assemblies. Depending on the size of the package body, PCB CTE, whether underfill is used, the alloy used for the balls, board thickness and the mounting method, it can be determined whether corner-ball fatigue will be more of an issue than voiding or bridging for that specific design. The qualification plan should define the thermal cycling range and dwell time, vibration profile, how the board will be supported during testing, and what failure modes are actually demonstrated in the FAI and life-test data for that specific package/board pair.
Medical Device PCB
The required level of X-ray coverage on medical PCBs is determined by the product’s risk classification and the customer’s control plan. Sampling, FAI or 100% inspection may each be valid depending on the specified inputs and the particular construction of the package. A void is a defect location, and whether its size and location can significantly threaten joint integrity depends on the package type, ball alloy and intended conditions of use. This can only be confirmed through testing or failure analysis. Three key items must be verified for each board: the actual coverage specified; the paste-volume consistency data at the BGA site; and how the FCT results are tied to each individual serial number for traceability.
Telecommunications PCB
On communications boards, shielding cans, connector housings and dense escape routing are real obstacles to under-package imaging. Factors that determine whether these features will block oblique X-ray access include the assembly sequence, shield geometry, board thickness, BGA placement in relation to the shielding can, and whether 3D or CT imaging is available as a fallback. The DFM review should highlight any potential interference between shields and connectors before the layout is finalized and should also establish an imaging method that allows the package to be imaged once the shield is installed. Additionally, a high-I/O package paired with dense escape routing can create an unbalanced copper distribution. Profile measurements should confirm this at multiple locations on the PCB rather than only at the center of the PCB.
Industrial Control PCB
FAI provides information regarding product integrity at the time of inspection, but it does not measure the years of thermal or mechanical loading that an industrial PCB must withstand. The qualification plan indicates the cycle count, temperature range and vibration profile that a PCB must withstand before production release. Therefore, board support during reflow, joint-fatigue resistance and, where applicable, accelerated life testing will hold greater importance than initial yield in this category.
High-Density Computing PCB
Large FCBGAs can warp unevenly during thermal reflow, resulting in the center package balls being under-collapsed while an X-ray image taken after reflow shows the surrounding balls as acceptable. This problem can result from the combined effects of package size, substrate construction, PCB thickness, support structure and the warpage behavior of the package and PCB at reflow temperature rather than at ambient temperature. High-ball-count, high-power-density packages require package-specific X-ray coverage and warpage measurement. Warpage measurements should be taken at reflow temperature. X-ray coverage should follow the actual package geometry rather than rely on a single sampling point, and engineers should determine how the support and profile were adapted for the particular FCBGA assembly being tested.
Smartphone PCB
A dropped phone or an improperly supported chassis may cause flexing of a smartphone PCB and, in turn, cracking of the pad or laminate beneath the WLCSP instead of the solder ball itself. Standoff height and paste-volume margin are key parameters for determining the failure mode in smartphone PCB assemblies, but the result also varies depending on the specific PCB assembly design, including pad design, solder-alloy selection, underfill use, PCB thickness, package size and drop orientation. Pad or laminate damage may not be detected using an inspection method that evaluates only the solder ball. Verify that the WLCSP imaging and structural inspection method includes evaluation of the pad and laminate conditions adjacent to the WLCSP solder joint alongside the solder ball.
Internet of Things PCB
As manufacturers reduce test-point counts in cost-driven IoT designs, more of the defect-detection burden shifts to X-ray coverage because the total number and location of test points are fixed during design. Mixed component densities and irregularly shaped ground planes around sensor clusters can contribute to localized warpage that will not be detected by a center-of-board reflow profile measurement. Where there is a risk of localized warpage, profile measurement should include the areas immediately surrounding the sensor-cluster locations. Validate all test-point locations in a given IoT design, as well as the locations where profile measurements are taken, rather than assuming either by category.
Wearable Electronics PCB
Wearable PCB failures may appear later in service rather than as day-one yield loss. Cyclic reliability data for wearable assemblies becomes a more meaningful data point than first-pass yield when determining the overall performance of a specific wearable device. The service life of wearable electronics and the amount of flex fatigue inherent in the design are not determined by a single universal standard, but by the wear pattern of the specific design together with the manufacturing process used to create it.
How to Choose a BGA Assembly Manufacturer?
When evaluating a BGA assembly manufacturer, a reputable manufacturer will have clear documentation explaining the conditions behind minimum pitch, inspection coverage and other manufacturing claims associated with the assembly process.
| Supplier Attribute | What Must Be Demonstrated | Rejection Signal |
|---|---|---|
| Package-specific DFM | Package drawing assessment, pad/via/stencil findings, board support and agreed standard/conditional/dedicated assessment process | Only publishes a minimum pitch number without package or PCB conditions |
| Fine-Pitch Manufacturing Proof | First-pass SPI/placement/profile/inspection output appropriate to the design | Uses equipment names or theoretical machine accuracy as the sufficient proof |
| Under-Package Joint Inspection | Defined X-ray/AXI method, views, coverage, pass-fail limits and record tied to board identity | Does not define the inspected object, views, coverage or retained records |
| Electrical and Functional Test Results | Available test points, program/fixture scope, firmware/input/output conditions and test results | Treats ICT and functional testing as interchangeable |
| Defect response | Symptom/result/root-cause separation, corrective action and controlled retesting | Lists common defects but cannot distinguish void, head-on-pillow, open, bridge or package-side crack mechanisms |
| Rework and reballing | Thermal-history assessment, pad/package condition, reball/replace decision and post-rework results | Promises damage-free rework or unlimited thermal cycles |
| Prototype-to-volume consistency | First article, defined process, lot/board traceability and capacity plan | Prototype and volume production use inconsistent manufacturing processes |
| Standards and certifications | Current standard revision, customer-specified class, certificate holder, scope and site applicability | Lists ISO/IPC/RoHS/REACH labels without demonstrating certificate or process applicability |
| Cost definition | Package, pitch, PCB, material, inspection, test, rework risk, volume and documentation scope | Provides a generic price without defined technical, inspection and test requirements |
SUGA conducts BGA PCB assembly in Shenzhen and the Pearl River Delta. SUGA engineering will evaluate every project and assign a qualified process based on package, PCB, inspection, reliability and volume requirements. SUGA will also remain responsible for process selection, maintaining quality records, traceability and documenting all controlled changes.
Maintaining Production Consistency
The final package and PCB revision in production should be directly connected to the DFM findings, measured profile, inspection method, test criteria and FAI records. When production moves to repeated lots, the same controls will continue to be linked to both the lot and board identity.
A component substitution, PCB revision, stencil change, process-site change or inspection change can affect the original manufacturing conditions. It is the supplier’s responsibility to evaluate and document the change before applying it.
A supplier is acceptable when it keeps the sample and volume builds on the same controlled manufacturing and inspection process. While capacity does matter, process consistency and documentation are what make capacity usable.
BGA Assembly Cost Drivers
The cost of BGA assembly is driven primarily by the technical work content required. The package pitch, body size and number of balls all affect the manufacturing process window. The layer count of the PCB, the HDI construction of the PCB and the support for the PCB all affect the way the board will be handled.
The stencil and paste requirements, development of the measured profile, X-ray inspection method and coverage, development of ICT, flying-probe or FCT, any underfill applied to the assembly, extent of rework exposure and FAI documentation all represent different amounts of work content.
Volume helps balance the amount of time spent setting up and repeating similar jobs; however, fine-pitch PCB assemblies do not simply add a fixed percentage. The cost of assembly will be higher when the assembly design requires a narrower process window, more stringent evidence of assembly quality, additional test development or a greater risk of rework. An effective commercial comparison should begin with the same technical and inspection requirements for each supplier being evaluated.
Frequently Asked Questions
A BGA can be heated, attached or removed from the PCB using bench equipment; however, assembling a BGA by hand is not considered the same as a qualified manufacturing process. A repeatable assembly process involves controlled paste deposition, alignment of the component with the PCB, control of the package thermal profile and inspection of the joints hidden by the package body. Bench methods may support limited laboratory or rework activities; however, these methods will not provide the same level of process documentation as a qualified manufacturing process.
FPGA represents a category of programmable semiconductor devices, whereas BGA represents a package and interconnect format. An FPGA may be packaged in a BGA; however, many BGA packages contain processors, memory or other devices. The function of the device is derived from the semiconductor; therefore, PCB pad, paste, reflow and inspection decisions are based on the package.
There is no specific height for BGA packages after reflow. The final standoff height for any BGA package will vary based on the package drawing, original ball geometry, paste deposit, alloy wetting, ball collapse, pad design and the measured assembly result. The component data and project inspection method will provide an expected height range for the selected component and PCB.
IPC Class 2 generally applies to dedicated-service products requiring continued performance and extended life. IPC Class 3 generally applies to high-performance products or products used in harsh environments where continued operation is critical. The difference between IPC Class 2 and IPC Class 3 assemblies will dictate the required level of workmanship and how acceptance criteria are defined. X-ray coverage, void limits and FCT coverage still require separate definition, as do the applicable soldering requirements for all IPC Class assemblies.